ADE7759_15 Datasheet, PDF (33/36 Pages) Analog Devices – Active Energy Metering IC with di/dt Sensor Interface

ADE7759
AEOF
(ACTIVE ENERGY REGISTER OVERFLOW)
RESET
(END OF A HARDWARE OR SOFTWARE RESET)
TEMP
(TEMPERATURE REGISTER READY)
ZX
(ZERO CROSSING DETECTED)
765 4 3210
0 1 0 0 0 0 0 0 ADDR: 04H/RESET: 05H
AEHF
(ACTIVE ENERGY REGISTER HALF FULL)
SAG
(LINE VOLTAGE SAG DETECT)
CYCEND
(LINE CYCLE ENERGY ACCUMULATION END)
WSMP
(WAVEFORM SAMPLING)
NOTE: REGISTER CONTENTS SHOW POWER ON DEFAULTS
Figure 49. Interrupt Status Register
765 4 3210
0 0 0 0 0 0 0 0 ADDR: 10H
AEOF
(ACTIVE ENERGY REGISTER OVERFLOW)
NOT USED
TEMP
(TEMPERATURE REGISTER READY)
ZX
(ZERO CROSSING DETECTED)
AEHF
(ACTIVE ENERGY REGISTER HALF FULL)
SAG
(LINE VOLTAGE SAG DETECT)
CYCEND
(END OF LINE CYCLE ENERGY ACCUMULATION)
WSMP
(WAVEFORM SAMPLING)
NOTE: REGISTER CONTENTS SHOW POWER ON DEFAULTS
Figure 50. Interrupt Enable Register
CH1OS Register (08H)
The CH1OS register is an 8-bit, read/write enabled register. The MSB of this register is used to switch on/off the digital integrator in Chan-
nel 1, and Bits 0 to 5 indicate the amount of the offset correction in Channel 1. Table VIII summarizes the function of this register.
Bit Location
0 to 5
Bit Mnemonic
OFFSET
6
Not Used
7
INTEGRATOR
Table VIII. CH1OS Register
Description
The six LSBs of the CH1OS register control the amount of dc offset correction in Channel 1
ADC. The 6-bit offset correction is sign and magnitude coded. Bits 0 to 4 indicate the magnitude
of the offset correction. Bit 5 shows the sign of the offset correction. A 0 in Bit 5 means the offset
correction is positive and a 1 indicates the offset correction is negative.
This bit is unused.
This bit is used to activate the digital integrator on Channel 1. The digital integrator is switched
on by setting this bit. This bit is set to be 1 on default.
CH1OS REGISTER*
765 4 3210
1 0 0 0 0 0 0 0 ADDR: 08H
DIGITAL INTEGRATOR SELECTION
1 = ENABLE
0 = DISABLE
SIGN AND MAGNITUDE CODED
OFFSET CORRECTION BITS
NOT USED
*REGISTER CONTENTS SHOW POWER-ON DEFAULT
Figure 51. CH1OS Register
REV. A
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