ADSP-2192 Datasheet, PDF (32/40 Pages) Analog Devices – DSP Microcomputer

ADSP-2192M
Sub-ISA Interface Read/Write Cycle Timing
Table 36, Figure 14, and Figure 15 describe Sub-ISA Interface
Read and Write operations.
Table 36. Sub-ISA Interface Read/Write Cycle Timing
Parameter
t_ISTW
t_ICYC
t_AESU
t_AEHD
t_ADSU
t_ADHD
t_DHD1
t_DHD2
t_RDDV
t_WDSU
t_RDY1
t_RDY2
IOR/IOW Strobe Width
IOR/IOW Cycle Time
AEN Setup to IOR/IOW Falling
AEN Hold from IOR/IOW Rising
Address Setup to IOR/IOW Falling
Address Hold from IOR/IOW Rising
Data Hold from IOR Rising
Data Hold from IOW Rising
IOR Falling to Valid Read Data
Write Data Setup to IOW Rising
IOR/IOW Rising from IOCHRDY Rising
IOCHRDY Falling from IOR/IOW Rising
Min
Max
Unit
100
ns
240
ns
10
ns
0
ns
10
ns
0
ns
20
ns
15
ns
40
ns
10
ns
0
ns
20
ns
AEN
IOCHRDY
IOR
ISAD15–0
ISAA3–1
t_AESU
t_RDY1
t_RDY2
t_AEHD
t_RDDV
t_ISTW
t_ICYC
t_DHD1
t_{AD SU}
t_ADHD
Figure 14. Sub-ISA Interface Read Cycle Timing
–32–
REV. 0