ADV7281 Datasheet, PDF (30/32 Pages) Analog Devices – 10-Bit, 4 Oversampled SDTV Video Decoder with Differential Inputs

ADV7281
Data Sheet
Figure 21 provides an example of how to connect the ADV7281-M. For detailed schematics of the ADV7281-M evaluation board, contact
a local Analog Devices, Inc., field applications engineer or an Analog Devices distributor.
D_VDD_1.8V
D_VDDIO_3.3V
A_VDD_1.8V
M_VDD_1.8V
DIFF1+
FULLY
DIFFERENTIAL
150Ω
CVBS INPUT
DIFF1–
1.3kΩ
1.3kΩ
430Ω
0.1µF
430Ω _0.1µF
9.1kΩ
1 kΩ
AIN1
AIN2
DIAG1
0.1µF
10nF
0.1µF
10nF
0.1µF
10nF
0.1µF
10nF
D_VDDIO_3.3V
D_VDD_1.8V
M_{VDD_1.8V}
A_VDD _1.8V
P_VDD_1.8V
0.1µF
10nF
DIFF2+
1.3kΩ
PSEUDO
75Ω
DIFFERENTIAL
CVBS INPUT
DIFF2–
1.3kΩ
0.1µF
430Ω
430Ω
0.1µF
9.1kΩ
1 kΩ
AIN3
AIN4
DIAG2
A_IN1
A_IN2
DIAG1
A_IN3
A_IN4
SING LE -ENDED
CVBS INPUT
EXAMPLE
S ING LE -ENDED
CVBS INPUT
EXAMPLE
0.1µF
24Ω
51Ω
0.1µF
24Ω
51Ω
AIN5
AIN 6
DIAG2
A_IN5
A_IN6
LOCATE CLOSE TO, AND
ON THE SAME SIDE OF
THE PCB AS, THE ADV7281-M
47pF
28.63636MHz
47pF
D_VDDIO
4kΩ
ALSB TIED HIGH: I²C ADDRESS = 0x42
ALSB TIED LOW: I²C ADDRESS = 0x40
PWRDWN
RESET
SCLK
SDATA
17 _AIN1
18 _AIN2
22 _DIAG1
D0P ⁹
D0N ¹⁰
23 _AIN3
24 _AIN4
25 _DIAG2
26 _AIN5
27 _AIN6
ADV7281-M
14 _XTALP
CLKP ¹¹
CLKN ¹²
GPO2 ⁶
GPO1 ⁷
GPO0 ⁸
15 _XTALN
INTRQ ⁵
D0P
D0N
CLKP
CLKN
GPO2
GPO1
GPO0
INTRQ
29 _ALSB
32 _PWRDWN
28 _RESET
31 _SCLK
30 _SDATA
LOCATE VREFN AND VREFP CAPACITOR AS CLOSE
AS POSSIBLE TO THE ADV7281-M AND ON THE SAME
SIDE OF THE PCB AS THE ADV7281-M
VREFP ¹⁹
VREFN ²⁰
0.1µF
Figure 21. Typical Connection Diagram, ADV7281-M
Rev. A | Page 30 of 32