OP275 Datasheet, PDF (3/12 Pages) Analog Devices – Dual Bipolar/JFET, Audio Operational Amplifier

OP275
WAFER TEST LIMITS (@ V_S = ؎15.0 V, T_A = +25؇C unless otherwise noted)
Parameter
Symbol
Conditions
Limit
Units
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range¹
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage Range
Supply Current
V_OS
I_B
I_OS
V_CM
CMRR
PSRR
A_VO
V_O
I_SY
V_CM = 0 V
V_CM = 0 V
V_CM = ± 10.5 V
V = ± 4.5 V to ± 18 V
R_L = 2 kΩ
R_L = 10 kΩ
V_O = 0 V, R_L = ∞
1
350
50
± 10.5
80
85
250
± 13.5
5
mV max
nA max
nA max
V min
dB min
dB min
V/mV min
V min
mA max
NOTES
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard
product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
1_{Guaranteed by CMRR test.}
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS¹
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Input Voltage² . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Differential Input Voltage² . . . . . . . . . . . . . . . . . . . . . . . ± 7.5 V
Output Short-Circuit Duration to GND³ . . . . . . . . . Indefinite
Storage Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
OP275G . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range
P, S Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . +300°C
Package Type
θ_JA4
8-Pin Plastic DIP (P)
103
8-Pin SOIC (S)
158
θ_JC
Units
43
°C/W
43
°C/W
NOTES
1_{Absolute maximum ratings apply to both DICE and packaged parts, unless}
otherwise noted.
2_{For supply voltages greater than ± 22 V, the absolute maximum input voltage is}
equal to the supply voltage.
3_{Shorts to either supply may destroy the device. See data sheet for full details.}
4_{θJA is specified for the worst case conditions, i.e., θJA is specified for device in socket}
for cerdip, P-DIP, and LCC packages; θ_JA is specified for device soldered in circuit
board for SOIC package.
ORDERING GUIDE
Model
Temperature Range Package Option
OP275GP
OP275GS
OP275GSR
OP275GBC
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
+25°C
8-Pin Plastic DIP
8-Pin SOIC
SO-8 Reel, 2500 pcs.
DICE
DICE CHARACTERISTICS
Die Size 0.070 × 0.108 in. (7,560 sq. mils)
Substrate is connected to V–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the OP275 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–3–