EVAL-AD7273 Datasheet, PDF (3/16 Pages) –

EVAL-AD7273/AD7274
EVALUATION BOARD HARDWARE
POWER SUPPLIES
When using this evaluation board with the EVAL-CONTROL-
BRD2, all supplies are provided from the EVAL-CONTROL-
BRD2 through the 96-way connector.
When using the board as a standalone unit, external supplies
must be provided. This evaluation board has nine power supply
inputs:
• EXT_VDD
• AGND
• +12 V
• −12 V
• AGND
• EXT_VREF
• AGND
• DVDD
• DGND
The VDD for the AD7273/AD7274 can be supplied either from
the EXT_VDD external supply or from the selected reference
chip. The +12 V and −12 V inputs are used to supply the
AD780, the REF195, and the OP467 quad op amp. The 0 V
input is connected to one or both of the AGND inputs. The
reference voltage can be applied externally via EXT_VREF. The
DVDD input can be used to supply a separate +5 V for the
74LS04 DVDD pin. The DGND input must be tied to 0 V.
The supplies are decoupled to the relevant ground plane with
10 μF tantalum and 0.1 μF multilayer ceramic capacitors at the
pin where they enter the board. The supply pins of the quad op
amp and the references are also decoupled to AGND with 10 μF
tantalum and 0.1 μF ceramic capacitors. The AD7273/AD7274
VDD supply pin is decoupled to AGND with 10 μF tantalum and
0.1 μF multilayer ceramic capacitors. Extensive ground planes
are used on this board to minimize the effect of high frequency
noise interference. There are two ground planes, AGND and
DGND. These are connected at one location close to the
AD7273/AD7274.
SETUP CONDITIONS
Care should be taken before applying power and signals to the
evaluation board to ensure that all link positions are as per the
required operating mode.
Table 1 shows the position in which all the links are set when
the evaluation board is shipped. The board is compatible with
the EVAL-CONTROL-BRD2 when shipped.
Table 1. Initial Link and Switch Positions
Link No. Position
Function
LK1
Removed 50 Ω termination resistor is not applied to the input of the VIN circuit.
LK2
Inserted
AD780 is set to provide a +3 V reference.
LK3
Removed 50 Ω termination resistor is not applied to the input of the bias-up circuit.
LK4
B
LK5
A
VREF is supplied from the REF195.
VDD is selected as the dc bias voltage for the bias-up circuit.
LK6
A
+12 V is supplied from the EVAL-CONTROL-BRD2 via J4.
LK7
A
−12 V is supplied from the EVAL-CONTROL-BRD2 via J4.
LK8
B
SCLK signal from the EVAL-CONTROL-BRD2 is not inverted (for faster values of SCLK).
LK9
A
VCC is equal to that of VDD.
LK10
A
AIN SMB is connected to the input of the analog input buffer.
LK11
C
VDD for the AD7273/AD7274 is supplied from the EVAL-CONTROL-BRD2 via J4.
LK12
A
CS is supplied by the EVAL-CONTROL-BRD2.
LK13
A
SDATA is supplied by the EVAL-CONTROL-BRD2.
LK14
A
SCLK is supplied by the EVAL-CONTROL-BRD2.
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