CN-0121 Datasheet, PDF (3/3 Pages) Analog Devices – Synchronizing Multiple AD9910 1 GSPS Direct Digital Synthesizers

Circuit Note
1
2
3
4
CH1 200mVΩ CH2 200mVΩ M20.0ns
CH3 200mVΩ CH4 200mVΩ
CH2
–80V
Figure 5. DDS Unfiltered Outputs Phase Aligned Using the Setup in Figure 1.
COMMON VARIATIONS
Analog Devices offers a variety of direct digital synthesizers,
clock distribution chips, and clock buffers to build a DDS-based
clock generator. Refer to www.analog.com/dds and
www.analog.com/clock for more information.
CN-0121
LEARN MORE
AN-823 Application Note, Direct Digital Synthesizers in
Clocking Applications. Analog Devices.
AN-837 Application Note, DDS-Based Clock Jitter Performance
vs. DAC Reconstruction Filter Performance. Analog Devices.
Kester, Walt. 2005. The Data Conversion Handbook. Analog
Devices. Chapters 6 and 7.
Kester, Walt. 2006. High Speed System Applications. Analog
Devices. Chapter 2, “Optimizing Data Converter Interfaces.”
Kester, Walt. 2006. High Speed System Applications. Analog
Devices. Chapter 3, “DACs, DDSs, PLLs, and Clock
Distribution.”
MT-031 Tutorial, Grounding Data Converters and Solving the
Mystery of AGND and DGND. Analog Devices.
MT-085 Tutorial, Fundamentals of Direct Digital Synthesis
(DDS), Analog Devices.
MT-086 Tutorial, Fundamentals of Phase Locked Loops (PLL),
Analog Devices.
MT-101 Tutorial, Decoupling Techniques. Analog Devices.
Data Sheets and Evaluation Boards
AD9910 Data Sheet.
AD9910 Evaluation Board.
AD9520 Data Sheet.
AD9520 Evaluation Board.
ADCLK846 Data Sheet.
ADCLK846 Evaluation Board.
REVISION HISTORY
12/09—Rev. 0 to Rev. A
Changes to Figure 1 .......................................................................... 1
10/09—Revision 0: Initial Version
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