ADV7162_15 Datasheet, PDF (3/44 Pages) Analog Devices – 96-Bit, 220 MHz True-Color Video RAM-DAC

ADV7160/ADV7162
TIMING CHARACTERISTICS¹
(V_AA2= +5 V; V_REF = +1.235 V; R_SET = 280 Ω. IOR, IOG, IOB (R_L = 37.5 Ω, C_L = 10 pF).
specifications T_MIN to T_MAX3 unless otherwise noted.)
All
CLOCK CONTROL AND PIXEL PORT⁴
Parameter
f_CLOCK
t₁
t₂
t₃
220 MHz
Version
220
4.5
2.0
2.0
170 MHz 140 MHz
Version Version
170
140
5.88
7.14
2.5
2.86
2.5
2.86
Units
Conditions/Comments
MHz max
ns min
ns min
ns min
Pixel CLOCK Rate
Pixel CLOCK Cycle Time
Pixel CLOCK High Time
Pixel CLOCK Low Time
t₄
10
10
10
ns max
Pixel CLOCK to LOADOUT Delay
f_LOADIN
2:1 Multiplexing
4:1 Multiplexing
8:1 Multiplexing
t₅
2:1 Multiplexing
4:1 Multiplexing
8:1 Multiplexing
t₆
2:1 Multiplexing
4:1 Multiplexing
8:1 Multiplexing
t₇
2:1 Multiplexing
4:1 Multiplexing
8:1 Multiplexing
110
55
27.5
9.1
18.18
36.36
4
8
15
4
8
15
85
42.5
21.25
11.77
23.53
47.1
5
9
18
5
9
18
70
35
17.5
14.29
28.58
57.16
6
12
23
6
12
23
MHz max
MHz max
MHz max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
LOADIN Clocking Rate
LOADIN Cycle Time
LOADIN High Time
LOADIN Low Time
t₈
t₉
t₁₀
τ-t₁₁₅
t_PD6
2:1 Multiplexing
4:1 Multiplexing
8:1 Multiplexing
t₁₂
t₁₃
t₁₄
t₁₅
ANALOG OUTPUTS⁷
Parameter
0
0
0
5
5
5
0
0
0
τ-5
τ-5
τ-5
9
9
9
11
11
11
15
15
15
10
10
10
5
5
5
5
5
5
0
0
0
ns min
ns min
ns min
ns max
CLOCKs
CLOCKs
CLOCKs
ns max
ns max
ns min
ns min
Pixel Data Setup Time
Pixel Data Hold Time
LOADOUT to LOADIN Delay
LOADOUT to LOADIN Delay
Pipeline Delay
(1 × CLOCK = t₁)
Pixel CLOCK to PRGCKOUT Delay
SCKIN to SCKOUT Delay
BLANK to SCKIN Setup Time
BLANK to SCKIN Hold Time
220 MHz 170 MHz 140 MHz
Version Version Version
Units
Conditions/Comments
t₁₆
25
25
25
ns typ
Analog Output Delay
t₁₇
1
1
1
ns typ
Analog Output Rise/Fall Time
t₁₈
25
25
25
ns typ
Analog Output Transition Time
t_SK
2
2
2
ns max
RGB Analog Output Skew
0
0
0
ns typ
REV. 0
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