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AD9821_15 Datasheet, PDF (3/16 Pages) Analog Devices – Complete 12-Bit 40 MSPS Imaging Signal Processor
AD9821
IMAGER-MODE SPECIFICATIONS (TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 40 MHz, unless otherwise noted.)
Parameter
Min Typ Max Unit
Notes
POWER CONSUMPTION
150
mW
See TPC 1 for Power vs. Sample Rate
MAXIMUM CLOCK RATE
40
MHz
ANALOG INPUTS (VIN+, VIN–)
Input Common-Mode Range*
Max Input Amplitude*
Max Optical Black Pixel Amplitude*
0
1.8
1.0
± 30
V
V p-p
mV
Linear operating range for VIN+, VIN–
Defined as VIN+ minus VIN–
For stable Clamp at max VGA gain
VARIABLE GAIN AMPLIFIER (VGA)
Gain Control Resolution
Gain Monotonicity
Gain Range
Min Gain (VGA Gain Code 00)
Max Gain (VGA Gain Code 1023)
1024
Guaranteed
0
36
Steps
dB
dB
See Figure 11 for VGA Gain Curve
BLACK LEVEL CLAMP
Clamp Level Resolution
Clamp Level
Min Clamp Level
Max Clamp Level
256
Steps
Measured at ADC Output
0
LSB
255
LSB
SYSTEM PERFORMANCE
Gain Accuracy
Min Gain
Max Gain
Peak Nonlinearity, 500 mV Input
Total Output Noise
Power Supply Rejection (PSR)
–1
0
+1
34.5 35.5 36.5
0.3
0.5
40
Specifications Include Entire Signal Chain
dB
dB
%
LSB rms
dB
12 dB Gain Applied
AC Grounded Input, 6 dB Gain Applied
Measured with Step Change on Supply
POWER-UP RECOVERY TIME
Reference Standby Mode
Total Power-Down Mode
Power-Off Condition
Normal Clock Signals Applied
1
ms
3
ms
10
ms
*Input Signal Characteristics defined as follows:
+1.8V
VIN+
VIN–
GND
1V p-p MAX
INPUT SIGNAL RANGE ؎30mV MAX
OB PIXEL
INPUT
CM RANGE
Specifications subject to change without notice.
REV. 0
–3–