AD9245_15 Datasheet, PDF (3/32 Pages) Analog Devices – 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 3 V A/D Converter

Data Sheet
AD9245
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes Guaranteed
Offset Error
Gain Error¹
Differential Nonlinearity (DNL)²
Integral Nonlinearity (INL)²
TEMPERATURE DRIFT¹
Offset Error
Gain Error
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V Mode)
Load Regulation @ 1.0 mA
Output Voltage Error (0.5 V Mode)
Load Regulation @ 0.5 mA
INPUT REFERRED NOISE
VREF = 0.5 V
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF = 0.5 V
Input Span, VREF = 1.0 V
Input Capacitance³
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD²
IDRVDD²
PSRR
POWER CONSUMPTION
DC Input⁴
Sine Wave Input²
Standby Power⁵
AD9245BCP-20
AD9245BCP-40
AD9245BCP-65
Min Typ Max Min Typ Max Min Typ Max Unit
14
14
14
Bits
14
14
14
Bits
±0.30 ±1.60
±0.50 ±1.75
±0.50 ±1.75 % FSR
±0.30 ±3.25
±0.50 ±3.25
±0.50 ±6.90 % FSR
±0.50 ±1.00
±0.50 ±1.00
±0.50 ±1.00 LSB
±1.20 ±3.10
±1.40 ±3.40
±1.60 ±5.55 LSB
±2
±2
±3
ppm/°C
±12
±12
±12
ppm/°C
±5
±35
0.8
±2.5
0.1
±5
±35
0.8
±2.5
0.1
±5
±35 mV
0.8
mV
±2.5
mV
0.1
mV
2.28
2.28
2.28
LSB rms
1.08
1.08
1.08
LSB rms
1
1
1
V p-p
2
2
2
V p-p
7
7
7
pF
7
7
7
kΩ
2.7 3.0
3.6
2.25 3.0
3.6
30
2
±0.01
90
95
120
1.0
2.7 3.0
3.6
2.25 3.0
3.6
55
5
±0.01
165
180
220
1.0
2.7 3.0
3.6
2.25 3.0
3.6
100
7
±0.01
300
320
375
1.0
V
V
mA
mA
% FSR
mW
mW
mW
1 _{Gain errors and gain temperature coefficients are based on the ADC only (with a fixed 1.0 V external reference).}
2 _{Measured at maximum clock rate, low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.}
3 _{Input capacitance refers to the effective capacitance between one differential input pin and AGND.}
4 _{Measured with dc input at maximum clock rate.}
5 _{Standby power is measured with a dc input, the CLK pin inactive (that is, set to AVDD or AGND).}
Rev. E | Page 3 of 32