AD9215 Datasheet, PDF (3/36 Pages) Analog Devices – 10-Bit, 65/80/105 MSPS, 3V A/D Converter

AD9215
SPECIFICATIONS
AVDD = 3 V, DRVDD = 2.5 V, specified maximum conversion rate, 2 V p-p differential input, 1.0 V internal reference, unless otherwise
noted.
Table 1. DC Specifications
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error¹
Gain Error1
Differential Nonlinearity (DNL)²
Integral Nonlinearity (INL)2
TEMPERATURE DRIFT
Offset Error1
Gain Error¹
Reference Voltage (1 V Mode)
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V Mode)
Load Regulation @ 1.0 mA
Output Voltage Error (0.5 V Mode)
Load Regulation @ 0.5 mA
INPUT REFERRED NOISE
VREF = 0.5 V
VREF = 1.0 V
ANALOG INPUT
Input Span, VREF = 0.5 V
Input Span, VREF = 1.0 V
Input Capacitance³
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltage
AVDD
DRVDD
Supply Current
IAVDD2
IDRVDD2
PSRR
POWER CONSUMPTION
Sine Wave Input2
IAVDD2
IDRVDD2
Standby Power⁴
AD9215BRU-65/
AD9215BCP-65
AD9215BRU-80/
AD9215BCP-80
AD9215BRU-105/
AD9215BCP-105
Test
Temp Level Min Typ Max Min Typ Max Min Typ
Max Unit
Full VI
10
10
10
Bits
Full VI
Full VI
Full VI
Full VI
Full VI
Guaranteed
±0.3 ±2.0
0
+1.5 +4.0
−1.0 ±0.5 +1.0
±0.5 ±1.2
Guaranteed
±0.3 ±2.0
+1.5 +4.0
−1.0 ±0.5 +1.0
±0.5 ±1.2
Guaranteed
±0.3 ±2.0
+1.5 +4.0
−1.0 ±0.6 +1.2
±0.65 ±1.2
% FSR
% FSR
LSB
LSB
Full V
Full V
Full V
+15
+30
±230
+15
+30
±230
+15
+30
±230
ppm/°C
ppm/°C
ppm/°C
Full VI
Full V
Full V
Full V
±2 ±35
0.2
±1
0.2
±2 ±35
0.2
±1
0.2
±2
±35 mV
0.2
mV
±1
mV
0.2
mV
25°C V
0.8
0.8
25°C V
0.4
0.4
0.8
LSB rms
0.4
LSB rms
Full IV
1
1
1
V p-p
Full IV
2
2
2
V p-p
Full V
2
2
2
pF
Full V
7
7
7
kΩ
Full IV
Full IV
Full VI
25°C V
Full V
2.7 3.0 3.3 2.7 3.0 3.3 2.7 3.0 3.3
2.25 2.5 3.6 2.25 2.5 3.6 2.25 2.5 3.6
32 35
7.0
± 0.1
34.5 39
8.6
± 0.1
40
44
11.3
± 0.1
V
V
mA
mA
% FSR
Full VI
96
104
120
mW
25°C V
18
20
25
mW
25°C V
1.0
1.0
1.0
mW
1 _{With a 1.0 V internal reference.}
2 _{Measured at fIN = 2.4 MHz, full-scale sine wave, with approximately 5 pF loading on each output bit.}
3 _{Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 5 for the equivalent analog input structure.}
4 _{Standby power is measured with a dc input, the CLK pin inactive (i.e., set to AVDD or AGND).}
Rev. A | Page 3 of 36