AD6640 Datasheet, PDF (3/24 Pages) Analog Devices – 12-Bit, 65 MSPS IF Sampling A/D Converter

AD6640
SWITCHING SPECIFICATIONS1
(AV_CC = +5 V, DV_CC = +3.3 V; ENCODE & ENCODE = 65 MSPS; T_MIN = –40؇C, T_MAX = +85؇C)
Parameter (Conditions)
Temp
Test
Level
AD6640AST
Min
Typ
Max
Units
Maximum Conversion Rate
Minimum Conversion Rate²
Aperture Delay (t_A)
Aperture Uncertainty (Jitter)
ENCODE Pulsewidth High³
ENCODE Pulsewidth Low
Output Delay (t_OD) DV_CC +3.3 V/5.0 V⁴
Full
Full
+25°C
+25°C
+25°C
+25°C
Full
VI
65
MSPS
IV
6.5
MSPS
V
400
ps
V
0.3
ps rms
IV
6.5
ns
IV
6.5
ns
IV
8.5
10.5
12.5 ns
NOTES
1_{All switching specifications tested by driving ENCODE and ENCODE differentially.}
2_{A plot of Performance vs. Encode is shown in Figure 16 under Typical Performance Characteristics.}
3_{A plot of Performance vs. Duty Cycle (Encode = 65 MSPS) is shown in Figure 17 under Typical Performance Characteristics.}
4_{Outputs driving one LCX gate. Delay is measured from differential crossing of ENC, ENC to the time when all output data bits are within valid logic levels.}
Specifications subject to change without notice.
AC SPECIFICATIONS¹ (AVCC = +5 V, DVCC = +3.3 V; ENCODE & ENCODE = 65 MSPS; TMIN = –40؇C, TMAX = +85؇C)
Parameter (Conditions)
Temp
Test
Level
AD6640AST
Min
Typ
Max
Units
SNR
Analog Input
@ –1 dBFS
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
+25°C
V
68
dB
+25°C
I
64
67.7
dB
+25°C
V
67.5
dB
+25°C
V
66
dB
SINAD
Analog Input
@ –1 dBFS
2.2 MHz
15.5 MHz
31.0 MHz
69.0 MHz
Worst Harmonic² (2nd or 3rd)
Analog Input 2.2 MHz
@ –1 dBFS 15.5 MHz
31.0 MHz
69.0 MHz
Worst Harmonic² (4th or Higher)
Analog Input 2.2 MHz
@ –1 dBFS 15.5 MHz
31.0 MHz
69.0 MHz
Multitone SFDR (w/Dither)³
Eight Tones @ –20 dBFS
Two-Tone IMD Rejection⁴
F1, F2 @ –7 dBFS
Analog Input Bandwidth⁵
+25°C
V
68
+25°C
I
63.5
67.2
+25°C
V
67.0
+25°C
V
65.5
+25°C
V
80
+25°C
I
74
80
+25°C
V
79.5
+25°C
V
78.5
+25°C
V
85
+25°C
I
74
85
+25°C
V
85
+25°C
V
84
Full
V
90
Full
V
80
+25°C
V
300
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBc
dBFS
dBc
MHz
NOTES
1_{All ac specifications tested by driving ENCODE and ENCODE differentially.}
2_{For a single test tone at –1 dBFS, the worst case spectral performance is typically limited by the direct or aliased 2nd or 3rd harmonic. If a system is designed such}
that the 2nd and 3rd harmonics fall out-of-band, overall performance in the band of interest is typically improved by 5 dB. Worst Harmonic (4th or Higher) includes
4th and higher order harmonics and all other spurious components. Reference Figure 12 for more detail.
3_{See Overcoming Static Nonlinearities with Dither section for details on improving SFDR performance. To measure SFDR, eight tones from 14 MHz to 18 MHz}
(0.5 MHz spacing) are swept from –20 dBFS to –90 dBFS. An open channel at 16 MHz is used to monitor SFDR.
4_{F1 = 14.9 MHz, F2 = 16 MHz.}
5_{Specification is small signal bandwidth. Plots of Performance versus Analog Input Frequency are shown in Figures 10, 11 and 12. Sampling wide bandwidths}
(5 MHz–15 MHz) should be limited to 70 MHz center frequency.
Specifications subject to change without notice.
REV. 0
–3–