AD5641BKSZ Datasheet, PDF (3/20 Pages) Analog Devices – SPI Interface in LFCSP and SC70

Data Sheet
AD5641
SPECIFICATIONS
VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; −40°C < TA < +125°C; typical at +25°C; all specifications TMIN to TMAX,
unless otherwise noted.
Table 2.
A Grade
B Grade
Parameter
Min Typ Max Min Typ Max Unit
STATIC PERFORMANCE
Resolution
14
14
Bits
Relative Accuracy¹
±16
±4
LSB
Differential Nonlinearity¹
±1
±1
LSB
Zero-Code Error
0.5
10
0.5
10
mV
Offset Error
±0.63 ±10
±0.63 ±10 mV
Full-Scale Error
±0.5
±0.5
mV
Gain Error
±0.004 ±0.037
±0.004 ±0.037 % of FSR
Zero-Code Error Drift
5.0
5.0
µV/°C
Gain Temperature Coefficient
2.0
2.0
ppm of
FSR/°C
OUTPUT CHARACTERISTICS²
Output Voltage Range
0
VDD
0
VDD
V
Output Voltage Settling Time
6
10
6
10
µs
Slew Rate
0.5
0.5
V/µs
Capacitive Load Stability
470
470
pF
1000
1000
pF
Output Noise Spectral Density
120
120
nV/√Hz
Noise
2
2
µV
Digital-to-Analog Glitch
Impulse
Digital Feedthrough
DC Output Impedance
Short-Circuit Current
LOGIC INPUTS
Input Current³
VINL, Input Low Voltage
VINH, Input High Voltage
Pin Capacitance
POWER REQUIREMENTS
VDD
IDD (Normal Mode)
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
IDD (All Power-Down Modes)
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
POWER EFFICIENCY
IOUT/IDD
5
0.2
0.5
15
1.8
1.4
3
2.7
75
60
0.5
0.2
96
5
0.2
0.5
15
±2
0.8
0.6
1.8
1.4
3
5.5
2.7
100
75
90
60
0.5
0.2
96
nV-s
nV-s
Ω
mA
±2
µA
0.8
V
0.6
V
V
V
pF
5.5
V
100 µA
90
µA
µA
µA
%
Test Conditions/Comments
Guaranteed monotonic by design
All 0s loaded to DAC register
All 1s loaded to DAC register
Code ¼ scale to ¾ scale, to ±1 LSB
RL = ∞
RL = 2 kΩ
DAC code = midscale, 1 kHz
DAC code = midscale, 0.1 Hz to
10 Hz bandwidth
1 LSB change around major carry
VDD = 3 V/5 V
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
All digital inputs at 0 V or VDD
DAC active and excluding load current
VIH = VDD and VIL = GND
VIH = VDD and VIL = GND
VIH = VDD and VIL = GND
VIH = VDD and VIL = GND
ILOAD = 2 mA and VDD = ±5 V, full-scale
loaded
1 _{Linearity calculated using a reduced code range (Code 256 to Code 16,128).}
2 _{Guaranteed by design and characterization, not production tested.}
3 _{Total current flowing into all pins.}
Rev. D | Page 3 of 20