AD5546 Datasheet, PDF (3/16 Pages) Analog Devices – Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors

AD5546/AD5556
SPECIFICATIONS
Table 1. Electrical Characteristics. VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = –10 V to 10 V, TA = full operating
temperature range, unless otherwise noted.
Parameter
Symbol
Conditions
Min
Typ
Max
STATIC PERFORMANCE¹
Resolution
N
AD5546, 1 LSB = VREF/2¹⁶ = 153 µV at
16
VREF = 10 V
Resolution
N
AD5556, 1 LSB = VREF/2¹⁴ = 610 µV at
14
VREF = 10 V
Relative Accuracy
INL
Grade: AD5556C
±1
Relative Accuracy
INL
Grade: AD5546B
±2
Differential Nonlinearity
DNL
Monotonic
±1
Output Leakage Current
IOUT
Data = zero scale, TA = 25°C
10
Output Leakage Current
IOUT
Data = zero scale, TA = TA maximum
20
Full-Scale Gain Error
GFSE
Data = full scale
±1
±4
Bipolar Mode Gain Error
GE
Data = full scale
±1
±4
Bipolar Mode Zero-Scale
GZSE
Error
Data = full scale
±1
±2.5
Full-Scale Tempco
2
TCVFS
1
REFERENCE INPUT
VREF Range
VREF
–18
+18
REF Input Resistance
REF
4
5
6
R1 and R2 Resistance
R1 and R2
4
5
6
R1-to-R2 Mismatch
∆(R1 to R2)
±0.5
±1.5
Feedback and Offset
Resistance
RFB, ROFS
8
10
12
Input Capacitance²
CREF
5
ANALOG OUTPUT
Output Current
IOUT
Data = full scale
2
Output Capacitance
2
COUT
Code dependent
200
LOGIC INPUT AND OUTPUT
Logic Input Low Voltage
VIL
VDD = 5 V
0.8
Logic Input Low Voltage
VIL
VDD = 3 V
0.4
Logic Input High Voltage
VIH
VDD = 5 V
2.4
Logic Input High Voltage
VIH
VDD = 3 V
2.1
Input Leakage Current
IIL
10
Input Capacitance
2
CIL
10
INTERFACE TIMING, 3
2
Data to WR Setup Time
tDS
VDD = 5 V
20
Unit
Bits
Bits
LSB
LSB
LSB
nA
nA
mV
mV
mV
ppm/°C
V
kΩ
kΩ
Ω
kΩ
pF
mA
pF
V
V
V
V
µA
pF
ns
VDD = 3 V
35
ns
Data to WR Hold Time
tDH
VDD = 5 V
0
ns
VDD = 3 V
0
ns
WR Pulse Width
t_WR
VDD = 5 V
20
ns
VDD = 3 V
35
ns
LDAC Pulse Width
tLDAC
VDD = 5 V
20
ns
VDD = 3 V
35
ns
RS Pulse Width
tRS
VDD = 5 V
20
ns
VDD = 3 V
35
ns
WR to LDAC Delay Time
tLWD
VDD = 5 V
0
ns
VDD = 3 V
0
ns
Rev. 0 | Page 3 of 16