ADSP-1981BL Datasheet, PDF (29/32 Pages) Analog Devices – AC 97 SoundMAX Codec

AD1981BL
SERIAL CONFIGURATION REGISTER
Index 0x74
Reg No.
0x74
Name
Serial
Config
D15
D14
D13
D12
D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
Default
SLOT16 REGM2 REGM1 REGM0 X
X
X CHEN X X X INTS X SPAL SPDZ SPLNK 0x7001
This register is not reset when the reset register (Register 0x00) is written.
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 42.
Bit
SPLNK
SPDZ
SPAL
INTS
CHEN
REGM0
REGM1
REGM2
SLOT16
Mnemonic
SPDIF Link
SPDIF DACZ
SPDIF ADC Loop-
Around
Interrupt Mode Select
Chain Enable
Master Codec Register
Mask
Slave 1 Codec Register
Mask
Slave 2 Codec Register
Mask
Enable 16-Bit Slot Mode
Function
This bit enables the SPDIF to link with the DAC for data requests.
0 = SPDIF and DAC are not linked.
1 = SPDIF and DAC are linked and receive the same data requests (reset default).
0 = Repeat last sample out of the SPDIF stream if FIFO underruns (reset default).
1 = Forces midscale sample out the SPDIF stream if FIFO underruns.
0 = SPDIF transmitter is connected to the ac-link stream (reset default).
1 = SPDIF transmitter is connected to the digital ADC stream, not the ac-link.
This bit selects the JS interrupt implementation path.
0 = Bit 0 Slot 12 (modem interrupt).
1 = Slot 6 valid bit (MIC ADC interrupt).
This bit enables chaining of a slave codec SDATA_IN stream into the ID0 pin (Pin 45).
0 = Disable chaining (reset default).
1 = Enable chaining into ID0 pin.
Slot 16 makes all ac-link slots 16 bits in length, formatted into 16 slots. This is a preferred mode for
DSP serial port interfacing.
MISCELLANEOUS CONTROL BIT REGISTER
Index 0x76
Reg
No. Name D15 D14 D13
D12 D11 D10 D9
D8 D7
D6
D5 D4
D3
D2
D1
D0
Default
0x76 Misc
DACZ X
Control
Bit
MSPLT LODIS DAM X
FMXE X MADPD 2CMIC X MADST VREFH VREFD MBG1 MBG0 0x0000
All registers are not shown, and bits containing an X are assumed to be reserved.
Table 43.
Bit
MBG [1:0]
Mnemonic
MIC Boost Gain Change
Register
Function
These two bits allow changing the MIC preamp gain from the nominal 20 dB gain.
This gain setting takes effect only while Bit D6 (M20) on the MIC volume register (0x0E) is set to 1;
otherwise, the MIC boost block has a gain of 0 dB.
00 = 20 dB gain (reset default).
01 = 10 dB gain.
10 = 30 dB gain.
11 = Reserved.
Rev. A | Page 29 of 32