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AD9984A Datasheet, PDF (29/44 Pages) Analog Devices – High Performance 10-Bit Display Interface
AD9984A
Hex
Read/Write,
Default
Address Read Only Bits Value
4 ***0 ****
Register Name
0x2D R/W
0x2E
R/W
0x34
R/W
0x36
R/W
3:0 **** 0000
7:0 1111 0000 Test Register 5
7:0 1111 0000 Test Register 6
2 **** *0** SOG Filter
0 **** ***0 VCO Gear
0x3C R/W
7:4 0000 ****
3 **** 0***
Auto Gain
2:0 **** *000
Description
Auto-Offset Hold.
Disables the auto-offset and holds the feedback result.
0 = Continuous update.
1 = One time update.
Must be written to default for proper operation.
Must be written to 0xE8 for proper operation.
Must be written to 0xE0 for proper operation.
SOG Filter Enable. When enabled, filters out SOG inputs less than 250 ns.
0 = SOG filter disabled.
1 = SOG filter enabled.
VCO Gear Select. Adds another range to the VCO. Used for lower
frequencies only.
0 = Disable low VCO gear.
1 = Enable low VCO gear.
Test Bits. Must be set to default for proper operation.
Auto Gain Matching Hold.
0 = Disables auto gain updates and holds the current auto offset values.
1 = Allows auto gain to continuously update.
Auto Gain Matching Enable.
000 = Auto gain matching is disabled.
110= Auto gain matching is enabled.
1 Functions with more than eight control bits, such as PLL divide ratio, gain, and offset, are only updated when the LSBs are written to (for example, Register 0x02 for
PLL divide ratio).
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