ADT7473 Datasheet, PDF (28/76 Pages) Analog Devices – dBCool Remote Thermal Monitor and Fan Controller

ADT7473
The fan inputs have an input resistance of nominally 160 kΩ to
ground, which should be taken into account when calculating
resistor values.
With a pull-up voltage of 12 V and pull-up resistor less than
1 kΩ, suitable values for R1 and R2 are 120 kΩ and 47 kΩ,
respectively. This gives a high input voltage of 3.35 V.
12V
V_CC
<1kΩ
R1*
TACH
OUTPUT
TACH
R2*
FAN SPEED
COUNTER
ADT7473
*SEE TEXT
Figure 40. Fan with Strong TACH Pull-Up to > VCC or Totem-Pole Output,
Attenuated with R1/R2
Fan Speed Measurement
The fan counter does not count the fan TACH output pulses
directly, because the fan speed could be less than 1,000 RPM
and it would take several seconds to accumulate a reasonably
large and accurate count. Instead, the period of the fan revolu-
tion is measured by gating an on-chip 90 kHz oscillator into the
input of a 16-bit counter for N periods of the fan TACH output
(see Figure 41), so the accumulated count is actually
proportional to the fan tachometer period, and inversely
proportional to the fan speed.
N, the number of pulses counted, is determined by the settings
of the TACH pulses per revolution register (Register 0x7B).
This register contains two bits for each fan, allowing one, two
(default), three, or four TACH pulses to be counted.
CLOCK
PWM
TACH 1
2
3
4
Figure 41. Fan Speed Measurement
Fan Speed Measurement Registers
The fan tachometer readings are 16-bit values consisting of a
2-byte read from the ADT7473.
Register 0x28, TACH1 Low Byte = 0x00 default
Register 0x29, TACH1 High Byte = 0x00 default
Register 0x2A, TACH2 Low Byte = 0x00 default
Register 0x2B, TACH2 High Byte = 0x00 default
Register 0x2C, TACH3 Low Byte = 0x00 default
Register 0x2D, TACH3 High Byte = 0x00 default
Register 0x2E, TACH4 Low Byte = 0x00 default
Register 0x2F, TACH4 High Byte = 0x00 default
Reading Fan Speed from the ADT7473
The measurement of fan speeds involves a 2-register read for
each measurement. The low byte should be read first. This
causes the high byte to be frozen until both high and low byte
registers have been read, preventing erroneous TACH readings.
The fan tachometer reading registers report back the number of
11.11 μs period clocks (90 kHz oscillator) gated to the fan speed
counter, from the rising edge of the first fan TACH pulse to the
rising edge of the third fan TACH pulse (assuming two pulses
per revolution are being counted). Because the device is
essentially measuring the fan TACH period, the higher the
count value, the slower the fan is actually running. A 16-bit fan
tachometer reading of 0xFFFF indicates either the fan has
stalled or is running very slowly (<100 RPM).
High Limit > Comparison Performed
Because the actual fan TACH period is measured, falling below
a fan TACH limit by 1 sets the appropriate status bit and can be
used to generate an SMBALERT.
Measuring Fan TACH
When the ADT7473 starts up, TACH measurements are locked.
In effect, an internal read of the low byte has been made for
each TACH input. The net result of this is that all TACH
readings are locked until the high byte is read from the
corresponding TACH registers. All TACH related interrupts are
also ignored until the appropriate high byte is read.
Once the corresponding high byte has been read, TACH
measurements are unlocked and interrupts are processed as
normal.
Fan TACH Limit Registers
The fan TACH limit registers are 16-bit values consisting of two
bytes.
Register 0x54, TACH1 Minimum Low Byte = 0xFF default
Register 0x55, TACH1 Minimum High Byte = 0xFF default
Register 0x56, TACH2 Minimum Low Byte = 0xFF default
Rev. A | Page 28 of 76