ADSP-2189M_15 Datasheet, PDF (28/32 Pages) Analog Devices – DSP Microcomputer

ADSP-2189M
Parameter
IDMA Read, Long Read Cycle
Timing Requirements:
t_IKR
IACK Low before Start of Read¹
t_IRK
End of Read after IACK Low²
Switching Characteristics:
t_IKHR
t_IKDS
t_IKDH
t_IKDD
t_IRDE
t_IRDV
t_IRDH1
t_IRDH2
IACK High after Start of Read¹
IAD15–0 Data Setup before IACK Low
IAD15–0 Data Hold after End of Read²
IAD15–0 Data Disabled after End of Read²
IAD15–0 Previous Data Enabled after Start of Read
IAD15–0 Previous Data Valid after Start of Read
IAD15–0 Previous Data Hold after Start of Read (DM/PM1)³
IAD15–0 Previous Data Hold after Start of Read (PM2)⁴
NOTES
1_{Start of Read = IS Low and IRD Low.}
2_{End of Read = IS High or IRD High.}
3_{DM read or first half of PM read.}
4_{Second half of PM read.}
Min
0
2
0.5t_CK – 2
0
0
2t_CK – 3
t_CK – 5
Max
10
10
11
IACK
IS
IRD
IAD15–0
t_IKR
t_IKHR
t_IRK
t_IRDE
t_IKDS
t_IKDH
t_IRDV
PREVIOUS
DATA
t_IRDH
READ
DATA
t_IKDD
Figure 31. IDMA Read, Long Read Cycle
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
–28–
REV. A