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ADSP-2186L Datasheet, PDF (27/34 Pages) Analog Devices – DSP Microcomputer
ADSP-2186L
CAPACITIVE LOADING
Figures 24 and 25 show the capacitive loading characteristics of
the ADSP-2186L.
25
VDD = 3.0V
20
T = ؉85؇C
15
the current load, iL, on the output pin. It can be approximated
by the following equation:
from which
tDECAY
= CL × 0.5V
iL
tDIS = tMEASURED – tDECAY
is calculated. If multiple pins (such as the data bus) are
disabled, the measurement value is that of the last pin to
stop driving.
INPUT
10
OR
OUTPUT
1.5V
1.5V
5
0
0 20 40 60 80 100 120 140 160 180 200
CL – pF
Figure 24. Typical Output Rise Time vs. Load Capacitance,
CL (at Maximum Ambient Operating Temperature)
18
16
14
VDD = 3.0V
T = +85؇C
12
10
8
6
4
2
NOMINAL
–2
–3
–4
–6
0
50
100
150
200
250
CL – pF
Figure 25. Typical Output Valid Delay or Hold vs. Load
Capacitance, CL (at Maximum Ambient Operating
Temperature)
TEST CONDITIONS
Output Disable Time
Output pins are considered to be disabled when they have
stopped driving and started a transition from the measured
output high or low voltage to a high impedance state. The out-
put disable time (tDIS) is the difference between tMEASURED and
tDECAY, as shown in the Output Enable/Disable diagram. The
time is the interval from when a reference signal reaches a high
or low voltage level to when the output voltages have changed
by 0.5 V from the measured output high or low voltage. The
decay time, tDECAY, is dependent on the capacitive load, CL, and
Figure 26. Voltage Reference Levels for AC Measure-
ments (Except Output Enable/Disable)
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high-impedance state to when they start
driving. The output enable time (tENA) is the interval from when
a reference signal reaches a high or low voltage level to when the
output has reached a specified high or low trip point, as shown
in the Output Enable/Disable diagram. If multiple pins (such as
the data bus) are enabled, the measurement value is that of the
first pin to start driving.
REFERENCE
SIGNAL
tMEASURED
VOH tDIS
(MEASURED)
OUTPUT
VOL
(MEASURED)
VOH (MEASURED) – 0.5V
VOL (MEASURED) +0.5V
tDECAY
tENA
2.0V
1.0V
VOH
(MEASURED)
VOL
(MEASURED)
OUTPUT STOPS
DRIVING
OUTPUT STARTS
DRIVING
HIGH-IMPEDANCE STATE. TEST CONDITIONS CAUSE
THIS VOLTAGE LEVEL TO BE APPROXIMATELY 1.5V.
Figure 27. Output Enable/Disable
IOL
TO
OUTPUT
PIN
50pF
+1.5V
IOH
Figure 28. Equivalent Device Loading for AC Measure-
ments (Including All Fixtures)
REV. A
–27–