ADAU1401 Datasheet, PDF (26/52 Pages) Analog Devices – SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs

ADAU1401
SELF-BOOT
On power-up, the ADAU1401 can load a program and a set
of parameters that have been saved in an external EEPROM.
Combined with the auxiliary ADC and the multipurpose pins,
this eliminates the need for a microcontroller in the system. The
self-booting is accomplished by the ADAU1401 acting as a master
on the I²C bus on startup, which occurs when the SELFBOOT
pin is set high. The ADAU1401 cannot self-boot in SPI mode.
The maximum necessary EEPROM size for program and
parameters is 9248 bytes, or just over 8.5 kB. This does not
include register settings or overhead bytes, but such factors do
not add a significant number of bytes. This much memory is
only needed if the program RAM (1024 × five bytes), parameter
RAM (1024 × four bytes), and interface registers (8 × four bytes)
are completely full. Most applications will not use the full program
and parameter RAMs, so an 8 kB EEPROM should be sufficient.
A self-boot operation is triggered on the rising edge of RESET
when the SELFBOOT and WP pins are set high. The ADAU1401
reads the program, parameters, and register settings from the
EEPROM. After the ADAU1401 finishes self-booting, additional
messages can be sent to the ADAU1401 on the I²C bus, although
this typically is not necessary in a self-booting application. The
I²C device address is 0x68 for a write and 0x69 for a read in this
mode. The ADDRx pins have different functions when the chip
is in this mode, so the settings on them can be ignored.
The ADAU1401 does not self-boot if WP is set low. Holding
this pin low allows the EEPROM to be programmed in-circuit.
The WP pin is pulled low (it typically has a resistor pull-up) to
enable writes to the EEPROM, but this in turn disables the self-
boot function until the WP pin is returned high.
The ADAU1401 is a master on the I²C bus during self-boot and
writeback. Although it is uncommon for an application using
self-boot to also have a microcontroller connected to the control
lines, care should be taken that no other device tries to write to the
I²C bus during self-boot or writeback. The ADAU1401 generates
SCL at 8 × fS; therefore, for a fS of 48 kHz, SCL runs at 384 kHz.
SCL has a duty cycle of 3/8 in accordance with the I²C specification.
The ADAU1401 reads from EEPROM Chip Address 0xA1. The
LSBs of the addresses of some EEPROMs are pin configurable;
in most cases, these pins should be tied low to set this address.
EEPROM Format
The EEPROM data contains a sequence of messages. Each
discrete message is one of the seven types defined in Table 20
and consists of a sequence of one or more bytes. The first byte
identifies the message type. Bytes are written MSB first. Most
messages are block write (0x01) types, which are used for writing
to the ADAU1401 program RAM, parameter RAM, and control
registers.
The body of the message following the message type should
start with a 0x00 byte; this is the chip address. As with all other
control port transactions, following the chip address is a 2-byte
register/memory address field.
Table 21 shows an example of what should be stored in the
EEPROM, starting with EEPROM Address 0. In this example,
the interface registers are first set to control port write mode
(Line 1), which is followed by 18 no-operation (no-op) bytes
(Line 2 to Line 4) so that the interface register data appears on
Page 2 of the EEPROM. Next follows the write header (Line 4)
and then 32 bytes of interface register data (Line 5 to Line 8).
Finally, the program RAM data, starting at ADAU1401 Address
0x04 0x00 is written (Line 9 to Line 11). In this example, the
program length is 70 words, or 350 bytes, so 332 more bytes are
included in the EEPROM but are not shown in Table 21.
Writeback
A writeback occurs when the WB pin is triggered and data is
written to the EEPROM from the ADAU1401. This function is
typically used to save the volume setting and other parameter
settings to the EEPROM just before power is removed from the
system. A rising edge on the WB pin triggers a writeback when
the device is in self-boot mode, unless a message to set the WB
to the falling edge sensitive (0x05) is contained in the self-boot
message sequence. Only one writeback takes place unless a
message to set multiple writebacks (0x04) is contained in the
self-boot message sequence. The WP pin is pulled low when a
writeback is triggered to allow writing to the EEPROM.
The ADAU1401 is only capable of writing back the contents of
the interface registers to the EEPROM. These registers are usually
set by the DSP program, but can also be written to directly after
setting Bit 6 of the core control register. The parameter settings
that should be saved are configured in SigmaStudio.
Rev. 0 | Page 26 of 52