ADT7517_15 Datasheet, PDF (24/44 Pages) Analog Devices – SPI-/IC-Compatible, Temperature Sensor, 4-Channel ADC and Quad Voltage Output

ADT7516/ADT7517/ADT7519
AIN
4pF
100Ω
Figure 52. Equivalent Analog Input ESD Circuit
AIN Interrupts
The measured results from the AIN inputs are compared with
the AIN VHIGH (greater than comparison) and VLOW (less than or
equal to comparison) limits. An interrupt occurs if the AIN
inputs exceed or equal the limit registers. These voltage limits
are stored in on-chip registers. Note that the limit registers are
8 bits long and the AIN conversion result is 10 bits long. If the
S/W RESET
voltage limits are not masked out, then any out-of-limit compari-
sons generate flags that are stored in the Interrupt Status 1
register (Address = 0x00) and one or more out-of-limit results
cause the INT/INT output to pull either high or low depending
on the output polarity setting. It is good design practice to mask
out interrupts for channels that are of no concern to the
application. Figure 53 shows the interrupt structure for the
ADT7516/ ADT7517/ADT7519. It gives a block diagram
representation of how the various measurement channels affect
the INT/INT pin.
INTERRUPT
STATUS
REGISTER
(TEMP AND
AIN1 TO AIN4)
WATCHDOG
LIMIT
COMPARISONS
INTERRUPT
STATUS
REGISTER 2
(V_DD)
INTERNAL
TEMP
EXTERNAL
TEMP
INTERRUPT
MASK
REGISTERS
V_DD
DIODE
FAULT
AIN1 TO AIN4
INT/INT
(LATCHED OUTPUT)
READ RESET
CONTROL
CONFIGURATION
REGISTER 1
INT/INT
ENABLE BIT
Figure 53. ADT7516/ADT7517/ADT7519 Interrupt Structure
Rev. B | Page 24 of 44