AD7903 Datasheet, PDF (24/29 Pages) Analog Devices – Dual Differential 16-Bit, 1 MSPS PulSAR ADC 12.0 mW in QSOP

Data Sheet
Chain Mode with Busy Indicator
Chain mode with a busy indicator can also be used to daisy-
chain both ADCs within an AD7903 on a 3-wire serial interface
while providing a busy indicator. This feature is useful for reducing
component count and wiring connections, for example, in isolated
multiconverter applications or for systems with limited interfacing
capacity. Data readback is analogous to clocking a shift register.
See Figure 49 for a connection diagram example using three
AD7903 ADCs. The corresponding timing is shown in Figure 50.
When SDIx and CNVx are low, SDOx is driven low. With SCKx
high, a rising edge on CNVx initiates a conversion, selects chain
mode, and enables the busy indicator feature. In this mode, CNVx
is held high during the conversion phase and the subsequent data
readback. When all ADCs in the chain have completed their
AD7903
conversions, the SDOx pin of the ADC closest to the digital host
(see the ADC labeled ADCx in the AD7903 B box in Figure 49)
is driven high. This transition on SDOx can be used as a busy
indicator to trigger the data readback controlled by the digital host.
The AD7903 then enters the acquisition phase and powers down.
The data bits stored in the internal shift register are clocked out,
MSB first, by subsequent SCKx falling edges. For each ADC,
SDIx feeds the input of the internal shift register and is clocked
by the SCKx falling edge. Each ADC in the chain outputs its
data MSB first, and 16 × N + 1 clocks are required to read back
the N ADCs. Although the rising edge can be used to capture the
data, a digital host using the SCKx falling edge allows a faster
reading rate and, consequently, more ADCs in the chain,
provided that the digital host has an acceptable hold time.
CNVx
AD7903
SDI1A ADC1 SDO1A
SCKx
AD7903 A
CNVx
AD7903
SDI2A ADC2 SDO2A
SCKx
CNVx
AD7903
SDIxB ADCx SDOxB
SCKx
AD7903 B
CONVERT
DIGITAL HOST
DATA IN
IRQ
CLK
NOTES
1. DASHED LINE DENOTED ADCs ARE WITHIN A GIVEN PACKAGE.
2. SDI1A AND SDO1A REFER TO THE SDI1 AND SDO1 PINS IN ADC1 IN THE FIRST AD7903 OF THE CHAIN (AD7903 A).
SDI2A AND SDO2A REFER TO THE SDI2 AND SDO2 PINS IN ADC2 OF AD7903 A. LIKEWISE, SDIxB AND SDOxB REFER
TO THE SDIx AND SDOx PINS IN BOTH ADC1 AND ADC2 OF THE SECOND AD7903 IN THE CHAIN (AD7903 B)
Figure 49. Chain Mode with Busy Indicator Connection Diagram
CNVx = SDI1_A
ACQUISITION
SCKx
t_HSCKCNV
SDO1_A = SDI2_A
SDO2_A = SDIx_B
SDOx_B
t_CONV
CONVERSION
t_SSCKCNV
t_EN
t_DSDOSDI
t_DSDOSDI
t_CYC
t_ACQ
t_SCKH
t_SCK
ACQUISITION
1
2
3
4
15
16
17
18
19
t_SSDISCK
t_HSDISCK
t_SCKL
31
32
33
34
35
D_A115 D_A114 D_A113
t_HSDO
t_DSDO
D_A11 D_A10
D_A215 D_A214 D_A213
D_A21 D_A20 D_A115 D_A114
D_A11 D_A10
D_Bx15 D_Bx14 D_Bx13
D_Bx1 D_Bx0 D_A215 D_A214
D_A21 D_A20 D_A115 D_A114
Figure 50. Chain Mode with Busy Indicator Serial Interface Timing
47
48
49
t_DSDOSDI
t_DSDOSDI
t_DSDODSI
D_A11 D_A10
Rev. B | Page 23 of 28