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ADSP-BF538_15 Datasheet, PDF (23/60 Pages) Analog Devices – Blackfin Embedded Processor
ADSP-BF538/ADSP-BF538F
SPECIFICATIONS
Note that component specifications are subject to change
without notice.
OPERATING CONDITIONS
Parameter
Conditions
Min
Nom Max
Unit
VDDINT
VDDINT
VDDEXT
VDDEXT
Internal Supply Voltage
Internal Supply Voltage
External Supply Voltage
External Supply Voltage
533 MHz Speed Grade Models1, 2
400 MHz Speed Grade Models1, 2
Models with on-chip flash2
Models without on-chip flash2, 3
0.8
1.25
1.375
V
0.8
1.2
1.32
V
2.7
3.3
3.6
V
2.25
3.0
3.6
V
VDDRTC Real-Time Clock Power Supply
Voltage
2.25
3.6
V
VIH
VIH5V
VIHCLKIN
VIL
VIL5V
High Level Input Voltage4
High Level Input Voltage5
High Level Input Voltage6
Low Level Input Voltage4, 7
Low Level Input Voltage 5
VDDEXT = Maximum
VDDEXT = Maximum
VDDEXT = Maximum
VDDEXT = Minimum
VDDEXT = Minimum
2.0
V
2.0
V
2.2
V
+0.6
V
+0.8
V
TJ
Junction Temperature
316-Ball Chip Scale Package Ball Grid Array (CSP_BGA) –40
@ TAMBIENT = –40°C to + 85°C
+110
°C
1 The regulator can generate VDDINT at levels of 0.85 V to 1.2 V with –5% to +10% tolerance and 1.25 V with –4% to +10% tolerance
2 See Ordering Guide on Page 58.
3 When VDDEXT < 2.70 V, on-chip voltage regulation is not supported.
4 The 3.3 V tolerant pins are capable of accepting up to 3.6 V maximum VIH The following bidirectional pins are 3.3 V tolerant: DATA15–0, SCK2–0, MISO2–0, MOSI2–0,
PF15–0, PPI3–0, SPI1SS, SPI1SEL1, PC9–5, SPI2SS, SPI2SEL1, RX2–1, TX2–1, TSCLK3–0, RSCLK3–0, TFS3–0, RFS3–0, DT2PRI, DT2SEC, DR2PRI, DR2SEC, DT3PRI,
DT3SEC, DR3PRI, DR3SEC, and TMR2–0. The following input-only pins are 3.3 V tolerant: RESET, RX0, TCK, TDI, TMS, TRST, ARDY, BMODE1–0, BR, DR0PRI,
DR0SEC, DR1PRI, DR1SEC, NMI, PPI_CLK, and RTXI.
5 The 5 V tolerant pins are capable of accepting up to 5.5 V maximum VIH. The following bidirectional pins are 5 V tolerant: SCL0, SCL1, SDA0, SDA1, CANTX, CANRX, and
PC4. The following input-only pin is 5 V tolerant: GPW.
6 Parameter value applies to the CLKIN input pin.
7 Parameter value applies to all input and bidirectional pins.
Rev. E | Page 23 of 60 | November 2013