ADSP-2183KSTZ-160 Datasheet, PDF (21/31 Pages) Analog Devices – DSP Microcomputer

ADSP-2183
Parameter
Min
Max
Unit
IDMA Write, Long Write Cycle
Timing Requirements:
t_IKW
IACK Low before Start of Write¹
0
ns
t_IKSU
IAD15–0 Data Setup before IACK Low^{2, 3}
0.5t_CK + 10
ns
t_IKH
IAD15–0 Data Hold after IACK Low^{2, 3}
2
ns
Switching Characteristics:
t_IKLW
t_IKHW
Start of Write to IACK Low⁴
Start of Write to IACK High
1.5t_CK
ns
15
ns
NOTES
1_{Start of Write = IS Low and IWR Low.}
2_{If Write Pulse ends before IACK Low, use specifications tIDSU, tIDH.}
3_{If Write Pulse ends after IACK Low, use specifications tIKSU, tIKH.}
4_{This is the earliest time for IACK Low from Start of Write. For IDMA Write Cycle relationships, please refer to the ADSP-21xx Family User’s Manual, Third Edition.}
IACK
IS
t_IKW
t_IKHW
t_IKLW
IWR
IAD15–0
t_IKSU
t_IKH
DATA
Figure 16. IDMA Write, Long Write Cycle
REV. C
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