ADV7123JSTZ330 Datasheet, PDF (20/24 Pages) Analog Devices – CMOS, 330 MHz Triple 10-Bit High Speed Video DAC

ADV7123
ANALOG SIGNAL INTERCONNECT
Place the ADV7123 as close as possible to the output connec-
tors, thus minimizing noise pickup and reflections due to
impedance mismatch.
The video output signals should overlay the ground plane and
not the analog power plane, thereby maximizing the high
frequency power supply rejection.
For optimum performance, the analog outputs should each
have a source termination resistance to ground of 75 Ω (doubly
terminated 75 Ω configuration). This termination resistance
should be as close as possible to the ADV7123 to minimize
reflections.
Additional information on PCB design is available in the
AN-333 Application Note, Design and Layout of a Video
Graphics System for Reduced EMI, which is available from
Analog Devices at www.analog.com.
POWER SUPPLY DECOUPLING
(0.1µF AND 0.01µF CAPACITOR
FOR EACH V_AA GROUP)
0.1µF
V_AA
35 COMP
13, 29,
30
V_AA
0.1µF
0.01µF
V_AA
39 TO 48
R9 TO R0 ^{VREF 36}
VIDEO
DATA
INPUTS
1 TO 10
G9 TO G0
R_SET 37
1
AD1580
2
R_SET
530Ω
V_AA
1kΩ
1µF
COAXIAL CABLE
75Ω
IOR 34
14 TO 23
75Ω
B9 TO B0
IOG 32
ADV7123
75Ω
12 SYNC
11 BLANK
24 CLOCK
38 PSAVE
IOB 28
75Ω 75Ω 75Ω
IOR 33
IOG 31
IOB 27
COMPLEMENTARY
OUTPUTS
75Ω
BNC
CONNECTORS
GND
25, 26
Figure 28. Typical Connection Diagram
MONITOR (CRT)
Rev. D | Page 20 of 24