ADA4938-2_15 Datasheet, PDF (20/28 Pages) Analog Devices – Ultralow Distortion Differential ADC Driver

ADA4938-1/ADA4938-2
Similar to the case of a conventional op amp, the output noise
voltage densities can be estimated by multiplying the input-
referred terms at +IN and −IN by the appropriate output factor,
where:
G_N
=
(β₁
2
+
β₂ )
is
the
circuit
noise
gain.
β₁
=
R_G1
R_F1 + R_G1
and
β₂
=
R_G2
R_F2 + R_G2
are the feedback factors.
When RF1/RG1 = RF2/RG2, β1 = β2 = β, and the noise gain
becomes
G_N
=
1
β
=1+
R_F
R_G
Note that the output noise from VOCM goes to zero in this case.
The total differential output noise density, vnOD, is the root-sum-
square of the individual output noise terms.
8
∑ ^v_nOD ⁼
v_n2Oi
i =1
THE IMPACT OF MISMATCHES IN THE FEEDBACK
NETWORKS
As previously mentioned, even if the external feedback networks
(RF/RG) are mismatched, the internal common-mode feedback
loop still forces the outputs to remain balanced. The amplitudes
of the signals at each output remain equal and 180° out of phase.
The input-to-output, differential mode gain varies proportionately
to the feedback mismatch, but the output balance is unaffected.
As well as causing a noise contribution from VOCM, ratio matching
errors in the external resistors result in a degradation of the
ability of the circuit to reject input common-mode signals, much
the same as for a four-resistor difference amplifier made from a
conventional op amp.
In addition, if the dc levels of the input and output common-
mode voltages are different, matching errors result in a small
differential-mode output offset voltage. When G = +1, with a
ground referenced input signal and the output common-mode
level set to 2.5 V, an output offset of as much as 25 mV (1% of
the difference in common-mode levels) can result if 1% tolerance
resistors are used. Resistors of 1% tolerance result in a worst-case
input CMRR of about 40 dB, a worst-case differential-mode
output offset of 25 mV due to 2.5 V level-shift, and no significant
degradation in output balance error.
CALCULATING THE INPUT IMPEDANCE OF AN
APPLICATION CIRCUIT
The effective input impedance of a circuit depends on whether
the amplifier is being driven by a single-ended or differential
signal source. For balanced differential input signals, as shown
in Figure 59, the input impedance (RIN, dm) between the inputs
(+DIN and −DIN) is simply RIN, dm = 2 × RG.
R_F
+D_IN
–D_IN
ADA4938
+V_S
R_G
+IN
V_OCM
R_G
–IN
R_F
V_{OUT, dm}
Figure 59. ADA4938 Configured for Balanced (Differential) Inputs
For an unbalanced, single-ended input signal (see Figure 60),
the input impedance is
( ) ^{RIN, cm}
=
⎜⎛
⎜
⎜
⎜⎝
1
−
2×
R_G
R_F
R_G +
R_F
⎟⎞
⎟
⎟
⎟⎠
R_F
+V_S
R_S
R_G
R_T
V_{OCM ADA4938}
V_{OUT, dm}
R_G
R_S
R_T
R_F
Figure 60. ADA4938-x Configured for Unbalanced (Single-Ended) Input
The input impedance of the circuit is effectively higher than it
would be for a conventional op amp connected as an inverter
because a fraction of the differential output voltage appears at
the inputs as a common-mode signal, partially bootstrapping
the voltage across the Input Gain Resistor RG.
INPUT COMMON-MODE VOLTAGE RANGE IN
SINGLE-SUPPLY APPLICATIONS
The ADA4938 is optimized for level-shifting, ground-referenced
input signals. As such, the center of the input common-mode
range is shifted approximately 1 V down from midsupply. The
input common-mode range at the summing nodes of the amplifier
is from 0.3 V above −VS to 1.6 V below +VS. To avoid clipping at
the outputs, the voltage swing at the +IN and −IN terminals must
be confined to these ranges.
Rev. A | Page 20 of 28