EVAL-ADF4112EB1 Datasheet, PDF (2/6 Pages) Analog Devices – CDMA Evaluation Board For PLL Frequency Synthesizer

EVAL-ADF4112EB1
Hardware Description
The evaluation board comes with a cable for connecting to
the printer port of a PC. The silk screen and cable diagram for
the evaluation board are shown below. The board schematic is
shown on pages 3 and 4.
EVAL-ADF411X
EVAL-ADF421X
61
72
83
94
5
9 Way
Female D-Type
To
ADF411X
ADF421X
Evaluation
Board
1
Black - CLK 2
14
Brown - DATA ₃
15
Red - LE ₄
16
Orange - CE ₅
17
PC
White - GND
Yellow 6
18
19
7
20
8
21
9
Blue 10 ²²
23
11
24
12
Purple ₁₃
25
25 Way Male
D-Type
To
PC Printer Port
Figure 2. PC Cable Diagram
Loop component values shown in the circuit diagram are for
836MHz RF output, 5mA CP current, VCO190-836T,
30kHz channel spacing and 3kHz loop bandwidth.
Figure 1. Evaluation Board Silkscreen
The board is powered from a single 9V battery. The power
supply ciruitry allows the user to choose either 3V or 5V for
the ADF4112 V_DD and V_P, and for the VCO supply. The
default settings are 3V for the ADF4113 V_DD and 5V for the
ADF4112 V_P and for the VCO supply. It is very important
to note that the ADF4112 V_DD should never exceed the
ADF4112 V_P. This can damage the device.
All components necessary for LO generation are on-board.
The 13MHz TCXO from Vectron provides the necessary
Reference Input. The PLL is made up of the ADF4112,
passive loop filter (20kHz bandwidth) and the VCO 190-
836T from Vari-L. The output is available at RFOUT
through a standard SMA connector. If the user wishes they
may use their own power supplies and reference input. In
this case, they need to insert SMA connectors to as shown on
the silkscreen and block diagram.
The AD7706 A/D converter is used to monitor the power
supply voltage and current consumption of the ADF4112.
This helps the user pick the optimum synthesizer settings for
power consumption and also provides an alert if the battery
voltage is too low to sustain the required 3V or 5V for the
board supply.
–2–
REV.PrA 04/00