CN-0311 Datasheet, PDF (2/4 Pages) Analog Devices – Broadband, Low Error Vector Magnitude (EVM) Direct Conversion Transmitter Using LO Divide-by-2 Modulator

CN-0311
Circuit Note
To achieve optimum performance, the only requirement is that the
LO inputs of the modulator be driven differentially. The ADF4351
provides differential RF outputs and is, therefore, an excellent
match. This PLL-to-modulator interface is applicable to all I/Q
modulators and I/Q demodulators that contain a 2XLO-based
phase splitter. Low noise LDOs ensure that the power management
scheme has no adverse impact on phase noise and error vector
magnitude (EVM). This combination of components represents
an industry-leading direct conversion transmitter performance
over a frequency range of 30 MHz to 2.2 GHz. For frequencies
above 2.2 GHz, it is recommended to use a divide-by-1 modulator,
as described in CN-0285.
CIRCUIT DESCRIPTION
The circuit shown in Figure 1 uses the ADF4351, a fully integrated
fractional-N PLL IC, and the ADL5385 wideband transmit
modulator. The ADF4351 provides the local oscillator (the LO is
twice the modulator RF output frequency) signal for the ADL5385
transmit quadrature modulator, which upconverts the analog
I/Q signals to RF. Taken together, the two devices provide a
wideband, baseband I/Q-to-RF transmit solution.
The ADF4351 is powered off the ultralow noise 3.3 V ADP150
regulator for optimal LO phase noise performance. The ADL5385
is powered off a 5 V ADP3334 LDO. The ADP150 LDO has an
output voltage noise of only 9 µV rms, integrated from 10 Hz to
100 kHz, and helps to optimize VCO phase noise and reduce
the impact of VCO pushing (equivalent to power supply
rejection). See CN-0147 for more details on powering the
ADF4351 with the ADP150 LDO.
The ADL5385 uses a divide-by-2 block to generate the quadrature
LO signals. The quadrature accuracy is, thus, dependent on the
duty cycle accuracy of the incoming LO signal (as well as the
matching of the internal divider flip-flops). Any imbalance in
the rise and fall times causes even-order harmonics to appear, as
evident on the ADF4351 RF outputs. When driving the modulator
LO inputs differentially, even-order cancellation of harmonics
is achieved, improving the overall quadrature generation. (See
“Wideband A/D Converter Front-End Design Considerations:
When to Use a Double Transformer Configuration.” Rob
Reeder and Ramya Ramachandran. Analog Dialogue, 40-07.)
Because sideband suppression performance is dependent on the
modulator quadrature accuracy, better sideband suppression is
achievable when driving the LO input ports differentially vs.
single-ended. The ADF4351 has differential RF outputs compared
to the single-ended output available on most of the competitor’s
PLL devices with integrated VCOs.
The ADF4351 output match consists of the ZBIAS pull-up and,
to a lesser extent, the decoupling capacitors on the supply node.
To get a broadband match, it is recommended to use either a
resistive load (ZBIAS = 50 Ω) or a resistive in parallel with a reactive
load for ZBIAS. The latter gives slightly higher output power,
depending on the inductor chosen. Use an inductor value of
19 nH or greater for LO operation below 1 GHz. The measured
results in this circuit were performed using ZBIAS = 50 Ω and an
output power setting of 5 dBm. When using the 50 Ω resistor,
this setting gives approximately 0 dBm on each output across
the full band, or 3 dBm differentially. The ADL5385 LO input
drive level specification is −10 dBm to +5 dBm; therefore, it is
possible to reduce the ADF4351 output power to save current.
A sweep of sideband suppression vs. RF output frequency is shown
in Figure 2. In this sweep, the test conditions were as follows:
• Baseband I/Q amplitude = 1.4 V p-p differential sine waves
in quadrature with a 500 mV dc bias
• Baseband I/Q frequency (fBB) = 1 MHz
• LO = 2 × RFOUT
A simplified diagram of the test setup is shown in Figure 3. A
modified ADL5385 evaluation board was used because the
standard ADL5385 board does not allow a differential LO
input drive.
0
DATA SHEET SPECIFICATION
–10
–20
–30
–40
–50
–60
–70
0
500
1000
1500
FREQUENCY (MHz)
2000
Figure 2. Sideband Suppression, RFOUT Swept from 30 MHz to 2200 MHz
This circuit achieves comparable or improved sideband
suppression performance when compared to driving the
ADL5385 with a low noise RF signal generator, as used in the
data sheet measurement. Using the differential RF outputs of
the ADF4351 provides even-order harmonic cancellation and
improves modulator quadrature accuracy. This affects sideband
suppression performance and EVM. A single carrier W-CDMA
composite EVM of better than 2% was measured with the circuit
shown in Figure 1. The solution thus provides a low EVM broad-
band solution for frequencies from 30 MHz to 2.2 GHz. For
frequencies above 2.2 GHz, use a divide-by-1 modulator
block, as described in CN-0285.
The complete design support package can be found at
http://www.analog.com/CN0311-DesignSupport.
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