CN-0205 Datasheet, PDF (2/9 Pages) Analog Devices – Interfacing the ADL5375 I/Q Modulator to the AD9122 Dual Channel, 1.2 GSPS High Speed DAC

CN-0205
TOP VIEW
Circuit Note
BOTTOM VIEW
AD9122
DAC
ADL5375
MODULATOR
FILTER
Figure 2. AD9122-M5375-EBZ Evaluation Board for Circuit Implementation
The DAC’s full-scale output current (IFS) is programmable from
10 mA to 30 mA. The nominal and default value is 20 mA. In
this configuration, the DAC outputs swing from 0 mA to 20 mA
across each of the four ground-referenced 50 Ω resistors (RB =
RBIP = RBIN = RBQP = RBQN). This establishes the 500 mV
dc bias level and a full-scale voltage swing of 2 V p-p differential
on each output pair (with no load). This 2 V p-p voltage swing
can be adjusted by the RL (RL = RSLI = RSLQ) shunt resistors
without affecting the 500 mV bias level. The resulting
differential peak-to-peak swing at the I/Q modulator input
is given by the equation
[[ ^{]] VSIGNAL}
= I _FS ×
2 × R_B × R_L
2 × R_B + R_L
Note that the relatively high differential input impedance of the
ADL5375 (typically >60 kΩ) can be ignored when calculating
this signal level. Figure 3 shows the relationship between the
peak-to-peak voltage swing and RL when 50 Ω bias-setting
resistors are used.
The ADL5375-05 and AD9122 are well matched in terms of
dynamic range and gain. As a result, there is no need for any
active gain between the devices. The I/Q modulator drive level
can be fine tuned as needed by adjusting the value of RL as
described above. For most applications, a value of 100 Ω for
RL is recommended. This results in a full-scale signal level of
1 V p-p (DAC output at 0 dBFS).
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