CN-0050 Datasheet, PDF (2/3 Pages) Analog Devices – Stable, Closed-Loop Automatic Power Control for RF Applications

CN-0050
Circuit Note
The basic connections for operating the ADL5330 in an AGC
loop with the AD8318 are shown in Figure 1. The AD8318 is a
1 MHz to 8 GHz precision demodulating logarithmic amplifier.
It offers a large detection range of 60 dB with ±0.5 dB
temperature stability. The gain control pin of the ADL5330 is
controlled by the output pin of the AD8318. This voltage,
VOUT, has a range of 0 V to near VPSx. To avoid overdrive
recovery issues, the AD8318 output voltage can be scaled down
using a resistive divider to interface with the 0 V to 1.4 V gain
control range of the ADL5330.
A coupler/attenuation of 23 dB is used to match the desired
maximum output power from the VGA to the top end of the
linear operating range of the AD8318 (at approximately −5 dBm
at 900 MHz).
The detector’s error amplifier uses CLPF, a ground-referenced
capacitor pin, to integrate the error signal (in the form of a
current). A capacitor must be connected to CLPF to set the loop
bandwidth and to ensure loop stability.
30
4
20
3
10
2
0
1
–10
0
–20
–1
–30
–2
T
AM MODULATED INPUT
T
1
AD8318 OUTPUT
2
3
ADL5330 OUTPUT
CH1 250mV Ω CH2 200mV M2.00ms
CH3 250mV Ω
T 0.00000s
Figure 3. Oscilloscope Showing an AM Modulated Input Signal
For the AGC loop to remain in equilibrium, the AD8318 must
track the envelope of the ADL5330 output signal and provide
the necessary voltage levels to the ADL5330 gain control input.
Figure 3 shows an oscilloscope screen shot of the AGC loop
depicted in Figure 1. A 100 MHz sine wave with 50% AM
modulation is applied to the ADL5330. The output signal from
the ADL5330 is a constant envelope sine wave with amplitude
corresponding to a setpoint voltage at the AD8318 of 1.5 V.
Also shown is the gain control response of the AD8318 to the
changing input envelope.
AD8318 WITH PULSED V_SET
T
T
–40
–3
–50
–4
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
SETPOINT VOLTAGE (V)
Figure 2. ADL5330 Output Power vs. AD8318 Setpoint Voltage,
PIN = −1.5 dBm
Figure 2 shows the transfer function of the output power vs. the
VSET voltage over temperature for a 900 MHz sine wave with
an input power of −1.5 dBm. Note that the power control of the
AD8318 has a negative sense. Decreasing VSET, which corres-
ponds to demanding a higher signal from the ADL5330, tends
to increase GAIN.
The AGC loop is capable of controlling signals just under the
full 60 dB gain control range of the ADL5330. The performance
over temperature is most accurate over the highest power range,
where it is generally most critical. Across the top 40 dB range
of output power, the linear conformance error is well within
±0.5 dB over temperature.
The broadband noise added by the logarithmic amplifier is
negligible.
1
ADL5330 OUTPUT
2
CH1 2.00V CH2 50.0mVΩ
M10.0µs
A CH1
T 20.2000µs
2.60V
Figure 4. Oscilloscope Showing the ADL5330 Output
Figure 4 shows the response of the AGC RF output to a pulse on
VSET. As VSET decreases to 1 V, the AGC loop responds with
an RF burst. Response time and the amount of signal
integration are controlled by the capacitance at the AD8318
CLPF pin—a function analogous to the feedback capacitor
around an integrating amplifier. An increase in the capacitance
results in slower response time.
The circuit must be constructed on a multilayer printed circuit
board with a large area ground plane. Proper layout, grounding,
and decoupling techniques must be used to achieve optimum
performance (see the MT-031 Tutorial and the MT-101 Tutorial
and the ADL5330 and ADL8318 evaluation board layouts).
Rev. B | Page 2 of 3