CN-0021 Datasheet, PDF (2/3 Pages) Analog Devices – Interfacing the ADL5375 I/Q Modulator to the AD9779A Dual-Channel, 1 GSPS High Speed DAC

CN-0021
Circuit Note
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10
100
1k
10k
R_L (Ω)
Figure 2. Relationship Between the AC Swing-Limiting Resistor and the
Peak-to-Peak Voltage Swing with 50 Ω Bias-Setting Resistors
the differential pair, as shown in Figure 1. It has the effect of
reducing the ac swing without changing the dc bias already
established by the 50 Ω resistors.
The value of this ac swing-limiting resistor is chosen based on
the desired ac voltage swing. Figure 2 shows the relationship
between the swing-limiting resistor and the peak-to-peak ac
swing that it produces when 50 Ω bias-setting resistors are used.
Note that all Analog Devices I/Q modulators present a relatively
high input impedance on their baseband inputs (typically >1 kΩ).
As a result, the input impedance of the I/Q modulator will have
no effect on the scaling of the DAC output signal.
It is generally necessary to low-pass filter the DAC outputs to
remove image frequencies when driving a modulator. The
above interface lends itself well to the introduction of such a
filter. The filter can be inserted between the dc bias setting
resistors and the ac swing-limiting resistor. Doing so establishes
the input and output impedances for the filter.
AD9779A
OUT1_P
OUT1_N
93
RBIP
50Ω
RBIN
92 50Ω
53.62nF
C1I
OUT2_N
OUT2_P
84
RBQN
50Ω
RBQP
83 ^50Ω
53.62nF
C1Q
LPI
771.1nH
350.1pF
C2I
LNI
771.1nH
LNQ
771.1nH
350.1pF
C2Q
LPQ
771.1nH
RSLI
100Ω
ADL5375-05
21
IBBP
22
IBBN
9
QBBN
RSLQ
100Ω
10
QBBP
Figure 3. DAC Modulator Interface with 10 MHz Third-Order, Low-Pass Filter
(Calculated Component Values)
A simulated filter example is shown in Figure 3 with a third-
order elliptical filter with a 3 dB frequency of 10 MHz.
Matching input and output impedances makes the filter design
easier, so the shunt resistor chosen is 100 Ω, producing an ac
swing of 1 V p-p differential for a 0 mA to 20 mA DAC full-
scale output current. The simulated frequency response of this
filter is shown in Figure 4. In a practical application, the use of
standard value components along with the input impedance of
the I/Q modulator (2900 kΩ in parallel with a few picofarads of
input capacitance), will slightly change the frequency response.
All the power supply pins of the ADL5375 must be connected to
the same 5 V source. Adjacent pins of the same name can be
tied together and decoupled to a large area ground plane with a
0.1 μF capacitor. These capacitors should be located as close as
possible to the device. The power supply can range between
4.75 V and 5.25 V.
The COM1 pin, COM2 pin, COM3 pin, and COM4 pin should
be tied to the same ground plane through low impedance paths.
The exposed paddle on the underside of the package should
also be soldered to a low thermal and electrical impedance
ground plane. If the ground plane spans multiple layers on the
circuit board, they should be stitched together with nine vias
under the exposed paddle. The AN-772 application note
discusses the thermal and electrical grounding of the
LFCSP_VQ in greater detail.
COMMON VARIATIONS
The interface described here can be used to interface
any TxDAC converter with ground referenced 0 mA to 20 mA
output currents to any I/Q modulator with a 0.5 V input bias
level. For zero-IF applications, the AD9783 dual DAC provides
an LVDS interface, while the CMOS-driven AD9788 dual DAC
can generate a fine resolution complex IF input to the I/Q
modulator. The ADL5370/ADL5371/ADL5372/ADL5373/
0
36
MAGNITUDE
–10
30
–20
24
GROUP DELAY
–30
18
–40
12
–50
6
–60
1
0
10
100
FREQUENCY (MHz)
Figure 4. Simulated Frequency Response for DAC Modulator Interface with
10 MHz Third-Order Bessel Filter
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