AD7859APZ Datasheet, PDF (2/28 Pages) Analog Devices – 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs

AD7859/AD7859L–SPECIFICATIONS1, 2
(AV_DD = DV_DD = +3.0 V to +5.5 V, REF_IN/REF_OUT = 2.5 V
External Reference, f_CLKIN = 4 MHz (for L Version: 1.8 MHz (0؇C to +70؇C) and 1 MHz (–40؇C to +85؇C)); f_SAMPLE = 200 kHz (AD7859) 100 kHz
(AD7859L); SLEEP = Logic High; T_A = T_MIN to T_MAX, unless otherwise noted.) Specifications in () apply to the AD7859L.
Parameter
A Version¹ B Version¹ Units
Test Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio³ 70
(SNR)
Total Harmonic Distortion (THD) –78
Peak Harmonic or Spurious Noise –78
Intermodulation Distortion (IMD)
Second Order Terms
–78
Third Order Terms
–78
Channel-to-Channel Isolation
–80
DC ACCURACY
Resolution
12
Integral Nonlinearity
±1
Differential Nonlinearity
±1
Unipolar Offset Error
±5
±2
Unipolar Offset Error Match
2(3)
Positive Full-Scale Error
±5
±2
Negative Full-Scale Error
±2
Full-Scale Error Match
1
Bipolar Zero Error
±1
Bipolar Zero Error Match
2
71
–78
–78
–78
–78
–80
12
± 0.5
±1
±5
±2
2
±5
±2
±2
1
±1
2
dB min
dB max
dB max
dB typ
dB typ
dB typ
Typically SNR is 72 dB
V_IN = 10 kHz Sine Wave, f_SAMPLE = 200 kHz
(for L Version: f_SAMPLE = 100 kHz @ f_CLKIN = 2 MHz)
V_IN = 10 kHz Sine Wave, f_SAMPLE = 200 kHz
(for L Version: f_SAMPLE = 100 kHz @ f_CLKIN = 2 MHz)
V_IN = 10 kHz Sine Wave, f_SAMPLE = 200 kHz
(for L Version: f_SAMPLE = 100 kHz @ f_CLKIN = 2 MHz)
fa = 9.983 kHz, fb = 10.05 kHz, f_SAMPLE = 200 kHz
(for L Version: f_SAMPLE = 100 kHz @ f_CLKIN = 2 MHz)
fa = 9.983 kHz, fb = 10.05 kHz, f_SAMPLE = 200 kHz
(for L Version: f_SAMPLE = 100 kHz @ f_CLKIN = 2 MHz)
V_IN = 25 kHz
Bits
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB max
LSB typ
LSB max
LSB max
LSB typ
LSB typ
5 V Reference V_DD = 5 V
Guaranteed No Missed Codes to 12 Bits
ANALOG INPUT
Input Voltage Ranges
Leakage Current
Input Capacitance
0 to V_REF
± V_REF/2
0 to V_REF
± V_REF/2
Volts
Volts
±1
±1
µA max
20
20
pF typ
i.e., AIN(+) – AIN(–) = 0 to V_REF, AIN(–) Can Be
Biased Up But AIN(+) Cannot Go Below AIN(–)
i.e., AIN(+) – AIN(–) = –V_REF/2 to +V_REF/2, AIN(–)
Should Be Biased to +V_REF/2 and AIN(+) Can Go
Below AIN(–) But Cannot Go Below 0 V
REFERENCE INPUT/OUTPUT
REF_IN Input Voltage Range
Input Impedance
REF_OUT Output Voltage
REF_OUT Tempco
LOGIC INPUTS
Input High Voltage, V_INH
CAL Pin
Input Low Voltage, V_INL
Input Current, I_IN
Input Capacitance, C_IN4
LOGIC OUTPUTS
Output High Voltage, V_OH
Output Low Voltage, V_OL
Floating State Leakage Current
Floating-State Output Capacitance⁴
Output Coding
2.3/V_DD
150
2.3/2.7
20
2.3/V_DD
150
2.3/2.7
20
V min/max
kΩ typ
V min/max
ppm/°C typ
Functional from 1.2 V
2.4
2.4
V min
AV_DD = DV_DD = 4.5 V to 5.5 V
2.1
2.1
V min
AV_DD = DV_DD = 3.0 V to 3.6 V
3
3
V min
AV_DD = DV_DD = 4.5 V to 5.5 V
2.4
2.4
V min
AV_DD = DV_DD = 3.0 V to 3.6 V
0.8
0.8
V max
AV_DD = DV_DD = 4.5 V to 5.5 V
0.6
0.6
V max
AV_DD = DV_DD = 3.0 V to 3.6 V
± 10
± 10
µA max
Typically 10 nA, V_IN = 0 V or V_DD
10
10
pF max
4
4
V min
2.4
2.4
V min
0.4
0.4
V max
± 10
± 10
µA max
10
10
pF max
Straight (Natural) Binary
2s Complement
AV_DD = DV_DD = 4.5 V to 5.5 V
AV_DD = DV_DD = 3.0 V to 3.6 V
I_SINK = 1.6 mA
Unipolar Input Range
Bipolar Input Range
–2–
REV. A