5962-9152101MXA Datasheet, PDF (2/16 Pages) Analog Devices – LC2MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System

AD7874–SPECIFICATIONS (VDD = +5 V, VSS = –5 V, AGND = DGND = 0 V, REF IN = +3 V, fCLK = 2.5 MHz
external. All specifications T_MIN to T_MAX unless otherwise noted.)
Parameter
A Version B Version S Version Units
Test Conditions/Comments
SAMPLE-AND-HOLD
Acquisition Time² to 0.01%
2
2
2
µs max
Droop Rate^{2, 3}
1
1
2
mV/ms max
–3 dB Small Signal Bandwidth³
500
500
500
kHz typ
V_IN = 500 mV p-p
Aperture Delay²
0
0
0
ns min
40
40
40
ns max
Aperture Jitter^{2, 3}
Aperture Delay Matching²
200
200
200
ps typ
4
4
4
ns max
SAMPLE-AND-HOLD AND ADC
DYNAMIC PERFORMANCE
Signal-to-Noise Ratio
70
71
70
dB min
f_IN = 10 kHz Sine Wave, f_SAMPLE = 29 kHz
Total Harmonic Distortion
–78
–80
–78
dB max
f_IN = 10 kHz Sine Wave, f_SAMPLE = 29 kHz
Peak Harmonic or Spurious Noise –78
–80
–78
dB max
f_IN = 10 kHz Sine Wave, f_SAMPLE = 29 kHz
Intermodulation Distortion
fa = 9 kHz, fb = 9.5 kHz, f_SAMPLE = 29 kHz
2nd Order Terms
–80
–80
–80
dB max
3rd Order Terms
–80
–80
–80
dB max
Channel-to-Channel Isolation²
–80
–80
–80
dB max
DC ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Positive Full-Scale Error⁴
Negative Full-Scale Error⁴
Full-Scale Error Match
Bipolar Zero Error
Bipolar Zero Error Match
12
12
12
Bits
±1
± 1/2
±1
LSB max
±1
±1
±1
LSB max No Missing Codes Guaranteed
±5
±5
±5
LSB max Any Channel
±5
±5
±5
LSB max Any Channel
5
5
5
LSB max Between Channels
±5
±5
±5
LSB max Any Channel
4
4
4
LSB max Between Channels
ANALOG INPUTS
Input Voltage Range
Input Current
± 10
± 600
± 10
± 600
± 10
± 600
Volts
µA max
REFERENCE OUTPUTS
REF OUT
REF OUT Error @ +25°C
T_MIN to T_MAX
REF OUT Temperature Coefficient
Reference Load Change
3
± 0.33
±1
± 35
±1
3
± 0.33
±1
± 35
±1
3
± 0.33
±1
± 35
±2
V nom
% max
% max
ppm/°C typ
mV max
Reference Load Current Change (0–500 µA)
Reference Load Should Not Be Changed During Conversion
REFERENCE INPUT
Input Voltage Range
Input Current
Input Capacitance³
2.85/3.15 2.85/3.15 2.85/3.15 V min/V max 3 V ± 5%
±1
±1
±1
µA max
10
10
10
pF max
LOGIC INPUTS
Input High Voltage, V_INH
2.4
Input Low Voltage, V_INL
0.8
Input Current, I_IN
± 10
Input Capacitance, C_IN3
10
LOGIC OUTPUTS
Output High Voltage, V_OH
4.0
Output Low Voltage, V_OL
0.4
DB0–DB11
Floating-State Leakage Current ± 10
Floating-State Output Capacitance 10
Output Coding
2.4
2.4
0.8
0.8
± 10
± 10
10
10
4.0
4.0
0.4
0.4
± 10
± 10
10
10
2s COMPLEMENT
V min
V max
µA max
pF max
V min
V max
µA max
pF max
V_DD = 5 V ± 5%
V_DD = 5 V ± 5%
V_IN = 0 V to V_DD
V_DD = 5 V ± 5%; I_SOURCE = 40 µA
V_DD = 5 V ± 5%; I_SINK = 1–6 mA
V_IN = 0 V to V_DD
POWER REQUIREMENTS
V_DD
V_SS
I_DD
I_SS
Power Dissipation
+5
+5
+5
V nom
± 5% for Specified Performance
–5
–5
–5
V nom
± 5% for Specified Performance
18
18
18
mA max
CS = RD = CONVST = +5 V; Typically 12 mA
12
12
12
mA max
CS = RD = CONVST = +5 V; Typically 8 mA
150
150
150
mW max CS = RD = CONVST = +5 V; Typically 100 mW
NOTES
1_{Temperature ranges are as follows: A, B Versions: –40°C to +85°C; S Version: –55°C to +125°C.}
2_{See Terminology.}
3_{Sample tested @ +25°C to ensure compliance.}
4_{Measured with respect to the REF IN voltage and includes bipolar offset error.}
5_{For capacitive loads greater than 50 pF a series resistor is required.}
Specifications subject to change without notice.
–2–
REV. C