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| ADSP-2181BSZ-133 Datasheet, PDF (19/32 Pages) Analog Devices – DSP Microcomputer | |||
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Parameter
Serial Ports
Timing Requirements:
tSCK
SCLK Period
tSCS
DR/TFS/RFS Setup before SCLK Low
tSCH
DR/TFS/RFS Hold after SCLK Low
tSCP
SCLKIN Width
Switching Characteristics:
tCC
CLKOUT High to SCLKOUT
tSCDE
SCLK High to DT Enable
tSCDV
tRH
SCLK High to DT Valid
TFS/RFSOUT Hold after SCLK High
tRD
TFS/RFSOUT Delay from SCLK High
tSCDH
DT Hold after SCLK High
tTDE
TFS (Alt) to DT Enable
tTDV
tSCDD
TFS (Alt) to DT Valid
SCLK High to DT Disable
tRDV
RFS (Multichannel, Frame Delay Zero) to DT Valid
Min
50
4
7
20
0.25tCK
0
0
0
0
ADSP-2181
Max
Unit
ns
ns
ns
ns
0.25tCK + 10
ns
ns
15
ns
ns
15
ns
ns
ns
14
ns
15
ns
15
ns
CLKOUT
SCLK
DR
TFSIN
RFSIN
RFSOUT
TFSOUT
DT
TFSOUT
ALTERNATE
FRAME MODE
RFSOUT
MULTICHANNEL MODE,
FRAME DELAY 0
(MFD = 0)
TFSIN
ALTERNATE
FRAME MODE
RFSIN
MULTICHANNEL MODE,
FRAME DELAY 0
(MFD = 0)
tCC
tCC
tSCS tSCH
tSCK
tSCP
tSCP
tRD
tRH
tSCDE
tSCDV
tTDE
tTDV
tSCDH
tSCDD
tRDV
tTDE
tTDV
tRDV
Figure 13. Serial Ports
REV. D
â19â
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