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ADUC845_12 Datasheet, PDF (18/108 Pages) Analog Devices – MicroConverter® Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU
ADuC845/ADuC847/ADuC848
Data Sheet
46 47 48 49 52 53 54 55
56 1 2 3 9 10 11 12
30 31 32 33 39 40 41 42
18 19 20 21 24 25 26 27
AIN1 56
AIN2 1
AIN3 2
AIN4 3
AIN5 9
AIN6 10
AIN7 11
AIN8 12
AIN9 15
AIN10 16
AINCOM/DAC 13
AIN
MUX
BUF PGA
BAND GAP
REFERENCE
REFIN+ 8
REFIN– 7
VREF
DETECT
200µA
200µA
IEXC1 11
IEXC2 12
CURRENT
SOURCE
MIX
POR
ADuC848
PRIMARY ADC
16-BIT
S-D ADC
ADC
CONTROL
AND
CALIBRATION
DAC
CONTROL
12-BIT
VOLTAGE
OUTPUT DAC
BUF
14 DAC
62 kBYTES PROGRAM/
FLASH/EE
4 kBYTES DATA/
FLASH/EE
2 × DATA POINTERS
11-BIT STACK POINTER
DOWNLOADER
DEBUGGER
SINGLE-
CYCLE
8052
MCU
CORE
PWM
CONTROL
DUAL
16-BIT
S-D DAC
DUAL
16-BIT
PWM
MUX
2304 BYTES
USER RAM
WATCHDOG
TIMER
16-BIT
COUNTER
TIMERS
POWER SUPPLY
MONITOR
PLL WITH PROG.
CLOCK DIVIDER
WAKE-UP/
RTC TIMER
40 PWM0
41 PWM1
42 PWMCLK
24 T0
25 T1
33 T2
39 T2EX
20 INT0
21 INT1
UART
SERIAL PORT
UART
TIMER
SPI SERIAL I2C SERIAL
INTERFACE INTERFACE
OSC
4 5 6 22 36 51 23 37 38 50 17
18 19
44 43 45
30 31 32 33
28 29
34 35
NOTES
1. THE PIN NUMBERS REFER TO THE LFCSP PACKAGE ONLY.
Figure 6. Detailed Block Diagram of the ADuC848
8052 INSTRUCTION SET
Table 4 documents the number of clock cycles required for each
instruction. Most instructions are executed in one or two clock
cycles resulting in 12.58 MIPs peak performance when operating
at PLLCON = 00H.
TIMER OPERATION
Timers on a standard 8052 increment by one with each machine
cycle. On the ADuC845, ADuC847, and ADuC848, one
machine cycle is equal to one clock cycle; therefore, the timers
increment at the same rate as the core clock.
ALE
On the ADuC834, the output on the ALE pin is a clock at 1/6th
of the core operating frequency. On the ADuC845, ADuC847,
and ADuC848, the ALE pin operates as follows. For a single
machine cycle instruction, ALE is high for the entire machine
cycle. For a two or more machine cycle instruction, ALE is high
for the first machine cycle and then low for the remainder of the
machine cycles.
EXTERNAL MEMORY ACCESS
The ADuC845, ADuC847, and ADuC848 do not support
external program memory access, but the parts can access up to
16 MB (24 address bits) of external data memory. When
accessing external RAM, the EWAIT register might need to be
programmed in order to give extra machine cycles to MOVX
commands to allow for differing external RAM access speeds.
Rev. C | Page 18 of 108