ADF4251_15 Datasheet, PDF (18/28 Pages) Analog Devices – Dual Fractional-N/Integer-N Frequency Synthesizer

ADF4251
Table VII. IF N Divider Register Map
IF
PRESCALER*
12-BIT IF B COUNTER*
6-BIT IF A COUNTER*
CONTROL
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9
P15 P14 P13 B12 B11 B10 B9
B8
B7
B6
B5
B4
B3
B2
B1
DB8
A6
DB7 DB6
A5
A4
DB5
A3
DB4
A2
DB3 DB2 DB1 DB0
A1 C3 (1) C2 (0) C1 (0)
P14
P13
0
0
0
1
1
0
1
1
PRESCALER VALUE
8/9
16/17
32/33
64/65
P15 IF CP GAIN
0
DISABLED
1
ENABLED
A COUNTER
A6
A5
..........
A2
A1
DIVIDE RATIO
0
0
..........
0
0
0
0
0
..........
0
1
1
0
0
..........
1
0
2
0
0
..........
1
1
3
.
.
..........
.
.
.
.
.
..........
.
.
.
.
.
..........
.
.
.
1
1
..........
0
0
60
1
1
..........
0
1
61
1
1
..........
1
0
62
1
1
..........
1
1
63
B12
B11
B10
B3
B2
B1
B COUNTER DIVIDE RATIO
0
0
0
..........
0
1
1
3
0
0
0
..........
1
0
0
4
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
.
.
.
..........
.
.
.
.
1
1
1
..........
1
0
0
4092
1
1
1
..........
1
0
1
4093
1
1
1
..........
1
1
0
4094
1
1
1
..........
1
1
1
4095
*N = BP + A, P IS PRESCALER VALUE. B MUST BE GREATER THAN OR EQUAL TO A FOR CONTIGUOUS VALUES OF N, N_MIN IS (P² – P) .
–18–
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