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AD7854ARZ Datasheet, PDF (18/28 Pages) Analog Devices – 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs
AD7854/AD7854L
Using The Internal (On-Chip) Reference
As in the case of an external reference the AD7854/AD7854L can
power up from one of two conditions, power-up after the sup-
plies are connected or power-up from a software power-down.
When using the on-chip reference and powering up when AVDD
and DVDD are first connected, it is recommended that the power-
up calibration mode be disabled as explained above. When using
the on-chip reference, the power-up time is effectively the time
it takes to charge up the external capacitor on the REFIN/
REFOUT pin. This time is given by the equation:
tUP = 9 × R × C
where R ≈ 150K and C = external capacitor.
The recommended value of the external capacitor is 100 nF;
this gives a power-up time of approximately 135 ms before a
calibration is initiated and normal operation should commence.
When CREF is fully charged, the power-up time from a software
power-down reduces to 5 µs. This is because an internal switch
opens to provide a high impedance discharge path for the refer-
ence capacitor during power-down—see Figure 22. An added
advantage of the low charge leakage from the reference capacitor
during power-down is that even though the reference is being
powered down between conversions, the reference capacitor
holds the reference voltage to within 0.5 LSBs with throughput
rates of 100 samples/second and over with a full power-down
between conversions. A high input impedance op amp like the
AD707 should be used to buffer this reference capacitor if it is
being used externally. Note, if the AD7854/AD7854L is left in
its powered-down state for more than 100 ms, the charge on
CREF will start to leak away and the power-up time will increase.
If this longer power-up time is a problem, the user can use a
partial power-down for the last conversion so the reference
remains powered up.
REFIN/OUT
EXTERNAL
CAPACITOR
SWITCH OPENS
DURING POWER-DOWN
ON-CHIP
REFERENCE
AD7854/
AD7854L
TO OTHER CIRCUITRY
BUF
Figure 22. On-Chip Reference During Power-Down
POWER VS. THROUGHPUT RATE
The main advantage of a full power-down after a conversion is
that it significantly reduces the power consumption of the part
at lower throughput rates. When using this mode of operation,
the AD7854/AD7854L is only powered up for the duration of
the conversion. If the power-up time of the AD7854/AD7854L
is taken to be 5 µs and it is assumed that the current during
power-up is 4.5 mA/1.5 mA typ, then power consumption as a
function of throughput can easily be calculated. The AD7854
has a conversion time of 4.6 µs with a 4 MHz external clock,
and the AD7854L has a conversion time of 9 µs with a 1.8 MHz
clock. This means the AD7854/AD7854L consumes 4.5 mA/
1.5 mA typ for 9.6 µs/14 µs in every conversion cycle if the parts
are powered down at the end of a conversion. The four graphs,
Figures 24, 25, 26 and 27, show the power consumption of the
AD7854 and AD7854L for VDD = 3 V as a function of through-
put. Table VII lists the power consumption for various throughput
rates.
Table VII. Power Consumption vs. Throughput
Throughput Rate
1 kSPS
10 kSPS
20 kSPS
50 kSPS
Power
AD7854
130 µW
1.3 mW
2.6 mW
6.48 mW
Power
AD7854L
65 µW
650 µW
1.25 mW
3.2 mW
4MHz/1.8MHz
OSCILLATOR
ANALOG
SUPPLY
+3V TO +5V
10␮F 0.1␮F
0.1␮F
0V TO 2.5V
INPUT
0.1␮F
0.01␮F
AVDD DVDD CLKIN
AIN(+)
AIN(–)
CONVST
CREF1
CREF2
AD7854/
AD7854L
HBEN
CS
RD
WR
AGND
BUSY
DGND
REFIN/REFOUT
DB0
DB11
CONVERSION
START SIGNAL
␮C/␮P
OPTIONAL
EXTERNAL
REFERENCE
AD780/
REF192
0.1nF EXTERNAL REFERENCE
0.1␮F ON-CHIP REFERENCE
FULL POWER-DOWN
AFTER A CONVERSION
PMGT1 = 0
PMGT0 = 1
Figure 23. Typical Low Power Circuit
–18–
REV. B