AD1941_15 Datasheet, PDF (18/36 Pages) Analog Devices – SigmaDSP Multichannel 28-Bit Audio Processor

AD1940/AD1941
SCK
SDA
START BY
MASTER
SCK
(CONTINUED)
SDA
(CONTINUED)
SCK
(CONTINUED)
SDA
(CONTINUED)
FRAME 1
CHIP ADDRESS BYTE 1
ADR
SEL
R/W
ACK. BY
AD1941
FRAME 2
SUBADDRESS BYTE 1
ACK. BY
AD1941
FRAME 3
SUBADDRESS BYTE 2
ACK. BY REPEATED
AD1941 START BY
MASTER
FRAME 4
CHIP ADDRESS BYTE
ADR
SEL
R/W
ACK. BY
AD1941
FRAME 5
READ DATA BYTE 1
ACK. BY
MASTER
FRAME 6
READ DATA BYTE 2
Figure 14. AD1941 I²C Read Format
ACK. BY STOP BY
MASTER MASTER
Table 13. Single Word I²C Write
S Chip Address, AS Subaddress High AS Subaddress Low AS Data Byte 1 AS Data Byte 2 … AS Data Byte N P
R/W = 0
Table 14. Burst Mode I²C Write
S Chip
Address,
R/W = 0
AS Subaddress
High
AS Subaddress
Low
AS Data
Word 1,
Byte 1
AS Data
Word 1,
Byte 2
AS Data
Word 2,
Byte 1
AS Data
Word 2,
Byte 2
AS … P
Table 15. Single Word I²C Read
S Chip
Address,
R/W = 0
AS Subaddress
High
AS Subaddress
Low
AS S Chip
Address,
R/W = 1
AS Data AM Data … AM Data P
Byte 1
Byte 2
Byte N
Table 16. Burst Mode I²C Read
S Chip
Address,
R/W = 0
AS Subaddress
High
AS Subaddress
Low
AS S Chip
Address,
R/W = 1
AS Data
Word 1,
Byte 1
AM Data
Word 1,
Byte 2
AM … P
S - Start Bit
P - Stop Bit
AM - Acknowledge by Master
AS - Acknowledge by Slave
Rev. B | Page 18 of 36