AM3352BZCZ100 Datasheet, PDF (173/236 Pages) Texas Instruments – Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)

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AM3356, AM3354, AM3352
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SPRS717F – OCTOBER 2011 – REVISED APRIL 2013
16-Bit DDR3
Interface
DDR_D15
8
DDR_D8
DDR_DQM1
DDR_DQS1
DDR_DQSn1
DDR_D7
8
DDR_D0
DDR_DQM0
DDR_DQS0
DDR_DQSn0
DDR_CK
DDR_CKn
DDR_ODT
DDR_CSn0
DDR_BA0
DDR_BA1
DDR_BA2
DDR_A0
15
DDR_A15
DDR_CASn
DDR_RASn
DDR_WEn
DDR_CKE
DDR_RESETn
DDR_VREF
8-Bit DDR3
Devices
DQ7
DQ7
DQ0
DM/TDQS
NC TDQS#
DQS
DQS#
DQ0
DM/TDQS
NC TDQS#
DQS
DQS#
CK
CK#
ODT
CS#
BA0
BA1
BA2
A0
A15
CAS#
RAS#
WE#
CKE
RESET#
ZQ
ZQ
VREFDQ
VREFCA
CK
CK#
ODT
CS#
BA0
BA1
BA2
A0
A15
CAS#
RAS#
WE#
CKE
RESET#
ZQ
VREFDQ
VREFCA
Zo ^{0.1 µF}
VDDS_DDR
Zo
DDR_VTT
Zo
Zo
DDR_VREF
ZQ
0.1 µF
0.1 µF
0.1 µF
0.1 µF
DDR_VTP
49.9 Ω
(±1%, 20 mW)
Zo
Termination is required. See terminator comments.
ZQ
Value determined according to the DDR3 memory device data sheet.
Figure 5-49. 16-Bit DDR3 Interface Using Two 8-Bit DDR3 Devices
Copyright © 2011–2013, Texas Instruments Incorporated
Peripheral Information and Timings 173
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