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ADSP-2186 Datasheet, PDF (17/36 Pages) Analog Devices – DSP Microcomputer
ADSP-2186
TIMING PARAMETERS
Parameter
Min
Max
Unit
Interrupts and Flag
Timing Requirements:
tIFS
IRQx, FI, or PFx Setup before CLKOUT Low1, 2, 3, 4
0.25 tCK + 15
ns
tIFH
IRQx, FI, or PFx Hold after CLKOUT High1, 2, 3, 4
0.25 tCK
ns
Switching Characteristics:
tFOH
Flag Output Hold after CLKOUT Low5
tFOD
Flag Output Delay from CLKOUT Low5
0.25 tCK – 7
ns
0.5 tCK + 5
ns
NOTES
1If IRQx and FI inputs meet tIFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on the
following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-2100 Family User’s Manual, Third Edition, for further informa-
tion on interrupt servicing.)
2Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQE.
4PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5Flag outputs = PFx, FL0, FL1, FL2, Flag_out.
CLKOUT
FLAG
OUTPUTS
IRQx
FI
PFx
tFOD
tFOH
tIFH
tIFS
Figure 12. Interrupts and Flags
REV. A
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