AD9241 Datasheet, PDF (17/24 Pages) Analog Devices – Complete 14-Bit, 1.25 MSPS Monolithic A/D Converter

deliberately left small to minimize the reference noise contribu-
tion. As a result, it is not possible to change the reference volt-
age rapidly in this mode without removing the CAPT/CAPB
Decoupling Network and driving these pins directly.
Variable Input Span with V_CM = 2.5 V
Figure 39 shows an example of the AD9241 configured for an
input span of 2 × VREF centered at 2.5 V. An external 2.5 V
reference drives the VINB pin thus setting the common-mode
voltage at 2.5 V. The input span can be independently set by a
voltage divider consisting of R1 and R2, which generates the
VREF signal. A1 buffers this resistor network and drives VREF.
Choose this op amp based on accuracy requirements. It is
essential that a minimum of a 10 µF capacitor in parallel with a
0.1 µF low inductance ceramic capacitor decouple the reference
output to ground.
2.5V+VREF
2.5V
2.5V–VREF
+5V
0.1µF
2.5V
REF
22µF R1
0.1µF
R2
0.1µF
A1
+5V
VINA
VINB
AD9241
VREF
SENSE
Figure 39. External Reference, V_CM = 2.5 V (2.5 V on VINB,
Resistor Divider to Make VREF)
Single-Ended Input with 0 to 2 ؋ VREF Range
Figure 40 shows an example of an external reference driving
both VINB and VREF. In this case, both the common mode
voltage and input span are directly dependent on the value of
VREF. More specifically, the common-mode voltage is equal to
VREF while the input span is equal to 2 × VREF. Thus, the
valid input range extends from 0 to 2 × VREF. For example, if
the REF191, a 2.048 external reference, was selected, the valid
input range extends from 0 V to 4.096 V. In this case, 1 LSB of
the AD9241 corresponds to 0.250 mV. It is essential that a
minimum of a 10 µF capacitor in parallel with a 0.1 µF low induc-
tance ceramic capacitor decouple the reference output to ground.
2xREF
0V
VINA
+5V
0.1µF
VREF
10µF 0.1µF
0.1µF
VINB
AD9241
VREF
+5V
SENSE
Figure 40. Input Range = 0 V to 2 × VREF
AD9241
Low Cost/Power Reference
The external reference circuit shown in Figure 41 uses a low
cost 1.225 V external reference (e.g., AD580 or AD1580) along
with an op amp and transistor. The 2N2222 transistor acts in
conjunction with 1/2 of an OP282 to provide a very low imped-
ance drive for VINB. The selected op amp need not be a high
speed op amp and may be selected based on cost, power and
accuracy.
3.75V
1.25V
1kΩ +5V
820Ω
VINA
0.1µF
1kΩ
1kΩ
1/2
OP282
7.5kΩ
+5V
10µF
2N2222
316Ω
0.1µF
VINB
AD9241
1.225V
VREF
AD1580
10µF 0.1µF
+5V
SENSE
Figure 41. External Reference Using the AD1580 and Low
Impedance Buffer
DIGITAL INPUTS AND OUTPUTS
Digital Outputs
The AD9241 output data is presented in positive true straight
binary for all input ranges. Table IV indicates the output data
formats for various input ranges, regardless of the selected input
range. A twos-complement output data format can be created
by inverting the MSB.
Table IV. Output Data Format
Input (V) Condition (V) Digital Output OTR
VINA –VINB
VINA –VINB
VINA –VINB
VINA –VINB
VINA –VINB
< – VREF
00 0000 0000 0000 1
= – VREF
00 0000 0000 0000 0
=0
10 0000 0000 0000 0
= + VREF – 1 LSB 11 1111 1111 1111 0
≥ + VREF
11 1111 1111 1111 1
OTR DATA OUTPUTS
1 111111 1111 1111
0 111111 1111 1111
0 111111 1111 1110
OTR
–FS+1/2 LSB
+FS –1 1/2 LSB
0 000000 0000 0001
0 000000 0000 0000
1 000000 0000 0000
–FS
–FS –1/2 LSB
+FS
+FS –1/2 LSB
Figure 42. Output Data Format
Out Of Range (OTR)
An out-of-range condition exists when the analog input voltage
is beyond the input range of the converter. OTR is a digital
output that is updated along with the data output corresponding
to the particular sampled analog input voltage. Hence, OTR has
the same pipeline delay (latency) as the digital data. It is LOW
when the analog input voltage is within the analog input range.
REV. 0
–17–