AD9225ARZ Datasheet, PDF (17/25 Pages) Analog Devices – Complete 12-Bit, 25 MSPS Monolithic A/D Converter

AD9225
USING AN EXTERNAL REFERENCE
Using an external reference may enhance the dc performance
of the AD9225 by improving drift and accuracy. Figures 20 and 21
show examples of how to use an external reference with the ADC.
Table III is a list of suitable voltage references from Analog
Devices. To use an external reference, the user must disable the
internal reference amplifier and drive the VREF pin. Connecting
the SENSE pin to AVDD disables the internal reference amplifier.
Table III. Suitable Voltage References
Internal
AD589
AD1580
REF191
Internal
Output
Voltage
1.00
1.235
1.225
2.048
2.0
Drift
(ppm/∞C)
26
10–100
50–100
5–25
26
Initial
Accuracy
% (max)
1.4
1.2–2.8
0.08–0.8
0.1–0.5
1.4
Operating
Current
1 mA
50 mA
50 mA
45 mA
1 mA
The AD9225 contains an internal reference buffer, A2 (see
Figure 5), that simplifies the drive requirements of an external
reference. The external reference must be able to drive about 5
kW (± 20%) load. Note that the bandwidth of the reference
buffer is deliberately left small to minimize the reference noise
contribution. As a result, it is not possible to change the refer-
ence voltage rapidly in this mode.
2.5V+VREF
2.5V
2.5V–VREF
+5V
0.1␮F
2.5V
REF
22␮F R1
0.1␮F
R2
0.1␮F
A1
+5V
VINA
AD9225
VINB
VREF
SENSE
Figure 20. External Reference
Variable Input Span with V_CM = 2.5 V
Figure 20 shows an example of the AD9225 configured for an
input span of 2 ¥ VREF centered at 2.5 V. An external 2.5 V refer-
ence drives the VINB pin thus setting the common-mode voltage
at 2.5 V. The input span can be independently set by a voltage
divider consisting of R1 and R2, which generates the VREF signal.
A1 buffers this resistor network and drives VREF. Choose this op
amp based on accuracy requirements. It is essential that a mini-
mum of a 10 mF capacitor in parallel with a 0.1 mF low inductance
ceramic capacitor decouple A1’s output to ground.
Single-Ended Input with 0 to 2 ¥ VREF Range
Figure 21 shows an example of an external reference driving both
VINB and VREF. In this case, both the common-mode voltage
and input span are directly dependent on the value of VREF. More
specifically, the common-mode voltage is equal to VREF while the
input span is equal to 2 ¥ VREF. The valid input range extends
from 0 to 2 ¥ VREF. For example, if the REF191, a 2.048 V exter-
nal reference was selected, the valid input range extends from 0 to
4.096 V. In this case, 1 LSB of the AD9225 corresponds to 1 mV.
It is essential that a minimum of a 10 mF capacitor in parallel with a
0.1 mF low inductance ceramic capacitor decouple the reference
output to ground.
2 ؋ REF
0V
+5V
0.1␮F
VREF
10␮F 0.1␮F
0.1␮F
VINA
VINB
AD9225
VREF
+5V
SENSE
Figure 21. Input Range = 0 V to 2 ¥ VREF
DIGITAL INPUTS AND OUTPUTS
Digital Outputs
The AD9225 output data is presented in positive true straight
binary for all input ranges. Table IV indicates the output data
formats for various input ranges regardless of the selected input
range. A twos complement output data format can be created by
inverting the MSB.
Input (V)
VINA–VINB
VINA–VINB
VINA–VINB
VINA–VINB
VINA–VINB
Table IV. Output Data Format
Condition (V)
< – VREF
= – VREF
=0
= + VREF – 1 LSB
≥ + VREF
Digital Output
0000 0000 0000
0000 0000 0000
1000 0000 0000
1111 1111 1111
1111 1111 1111
OTR
1
0
0
0
1
OTR DATA OUTPUTS
1 1111 1111 1111
0 1111 1111 1111
0 1111 1111 1110
OTR
–FS+1/2 LSB
+FS –1 1/2 LSB
0 0000 0000 0001
0 0000 0000 0000
1 0000 0000 0000
–FS
–FS –1/2 LSB
+FS
+FS –1/2 LSB
Figure 22. Output Data Format
Out-Of-Range (OTR)
An out-of-range condition exists when the analog input voltage is
beyond the input range of the converter. OTR is a digital output
that is updated along with the data output corresponding to the
particular sampled analog input voltage. OTR has the same pipe-
line delay (latency) as the digital data. It is low when the analog
input voltage is within the analog input range. It is high when the
analog input voltage exceeds the input range as shown in Figure
23. OTR will remain high until the analog input returns within
the input range and another conversion is completed. By logical
ANDing OTR with the MSB and its complement, overrange high
or underrange low conditions can be detected. Table V is a truth
table for the overrange circuit in Figure 24 which uses NAND
gates. Systems requiring programmable gain conditioning of the
AD9225 input signal can immediately detect an out-of-range
condition, eliminating gain selection iterations. OTR can also be
used for digital offset and gain calibration.
Rev. C
–17–