AD8505_16 Datasheet, PDF (17/20 Pages) Analog Devices – 20 μA Maximum, Rail-to-Rail I/O, Zero Input Crossover Distortion Amplifiers

AD8505/AD8506/AD8508
OUTLINE DIMENSIONS
3.00
2.90
2.80
1.70
5
4
3.00
1.60
2.80
1.50
2.60
1
2
3
1.30
1.15
0.90
0.15 MAX
0.05 MIN
1.90
BSC
0.95 BSC
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
0.50 MAX
0.35 MIN
SEATING
PLANE
0.55
10°
5°
0.20
0°
BSC
0.45
0.35
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 51. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
0.945
0.905
0.865
BALL A1
IDENTIFIER
0.415
0.400
0.385
1.425
1.385
1.345
TOP VIEW
(BALL SIDE DOWN)
0.230
0.200
0.170
0.645
0.600
0.555
SEATING
PLANE
2
1
A
0.287
0.267
0.80
0.247
BSC
B
0.40
BSC
C
0.05 NOM
COPLANARITY
0.40 BSC
BOTTOM VIEW
(BALL SIDE UP)
Figure 52. 6-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-6-7)
Dimensions shown in millimeters
Rev. E | Page 17 of 20