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AD4001 Datasheet, PDF (17/34 Pages) Analog Devices – 16-Bit, 2 MSPS, Precision SAR, Differential ADC
AD4001
Data Sheet
APPLICATIONS INFORMATION
TYPICAL APPLICATION DIAGRAMS
Figure 31 shows an example of the recommended connection
diagram for the AD4001 when multiple supplies are available.
This configuration is used for best performance because the
amplifier supplies can be selected to allow the maximum signal
range.
Figure 32 shows a recommended connection diagram when
using a single-supply system. This setup is preferable when only
a limited number of rails are available in the system and power
dissipation is of critical importance.
Figure 33 shows a recommended connection diagram when
using a fully differential amplifier.
VCM = VREF/2
VREF
0V
VCM = VREF/2
VREF
0V
V+ ≥ +6.5V
V+
AMP
V–
V+
AMP
V–
REF
AMP
LDO
1.8V
VCM = VREF/2
10kΩ
10kΩ
10µF
5V
0.1µF
0.1µF 1.8V TO 5V
HOST
SUPPLY
R
C
R
C
REF VDD
IN+
AD4001
IN–
GND
VIO
SDI
SCK
SDO
CNV
DIGITAL HOST
(MICROPROCESSOR/
FPGA)
3-WIRE/4-WIRE
INTERFACE
V– ≤ –0.5V
Figure 31. Typical Application Diagram with Multiple Supplies
V+ = +5V
REF1
AMP
LDO
0.9 × VREF
VCM = VREF0/2.1 × VREF
0.9 × VREF
VCM = VREF/2
0.1 × VREF
AMP
AMP
3
VCM = VREF/2
4.096V
10kΩ
10kΩ
10µF1
1.8V
0.1µF 0.1µF 1.8V TO 5V
HOST
SUPPLY
R
100nF 100nF
C
REF VDD
VIO
IN+
SDI
AD40012
SCK
SDO
DIGITAL HOST
(MICROPROCESSOR/
FPGA)
IN–
CNV
R
GND
3-WIRE/4-WIRE
C
INTERFACE
1SEE THE VOLTAGE REFERENCE INPUT
2SPAN COMPRESSION MODE ENABLED.
SECTION
FOR
REFERENCE
SELECTION.
CREF
IS
USUALLY
A
10µF
CERAMIC
CAPACITOR
(X7R).
3SEE TABLE 10 FOR RC FILTER AND AMPLIFIER SELECTION.
Figure 32. Typical Application Diagram with a Single Supply
Rev. 0 | Page 16 of 33