AD7904 Datasheet, PDF (16/24 Pages) Analog Devices – 4-Channel, 1 MSPS, 8-/10-/12-Bit ADCs with Sequencer in 16-Lead TSSOP

AD7904/AD7914/AD7924
When the ADC starts a conversion (see Figure 5), SW2 will
open and SW1 will move to position B, causing the comparator
to become unbalanced. The Control Logic and the Capacitive
DAC are used to add and subtract fixed amounts of charge from
the sampling capacitor to bring the comparator back into a
balanced condition. When the comparator is rebalanced, the
conversion is complete. The Control Logic generates the ADC
output code. Figures 7 and 8 show the ADC transfer functions.
CAPACITIVE
DAC
V_IN0
•.
•.
V_IN3
AGND
A
SW1
B
4k⍀
SW2
COMPARATOR
CONTROL
LOGIC
Figure 5. ADC Conversion Phase
Analog Input
Figure 6 shows an equivalent circuit of the analog input structure
of the AD7904/AD7914/AD7924. The two diodes D1 and D2
provide ESD protection for the analog inputs. Care must be
taken to ensure that the analog input signal never exceeds the
supply rails by more than 200 mV. This will cause these diodes
to become forward biased and start conducting current into the
substrate. 10 mA is the maximum current these diodes can
conduct without causing irreversible damage to the part. The
capacitor C1 in Figure 6 is typically about 4 pF and can primarily
be attributed to pin capacitance. The resistor R1 is a lumped com-
ponent made up of the on resistance of a switch (track and hold
switch) and also includes the on resistance of the input multiplexer.
The total resistance is typically about 400 Ω. The capacitor C2 is
the ADC sampling capacitor and has a capacitance of 30 pF
typically. For ac applications, removing high frequency compo-
nents from the analog input signal is recommended by use of an
RC low-pass filter on the relevant analog input pin. In applica-
tions where harmonic distortion and signal to noise ratio are
critical, the analog input should be driven from a low impedance
source. Large source impedances will significantly affect the ac
performance of the ADC. This may necessitate the use of an
input buffer amplifier. The choice of the op amp will be a
function of the particular application.
When no amplifier is used to drive the analog input, the source
impedance should be limited to low values. The maximum
source impedance will depend on the amount of total harmonic
distortion (THD) that can be tolerated. The THD will increase
as the source impedance increases and performance will degrade
(see TPC 5).
V_DD
V_IN
C1
4pF
D1
C2
R1
30pF
D2
CONVERSION PHASE: SWITCH OPEN
TRACK PHASE: SWITCH CLOSED
Figure 6. Equivalent Analog Input Circuit
ADC TRANSFER FUNCTION
The output coding of the AD7904/AD7914/AD7924 is either
straight binary or twos complement, depending on the status of
the LSB in the Control Register. The designed code transitions
occur at successive LSB values (i.e., 1 LSB, 2 LSBs, and so on).
The LSB size is REF_IN/256 for the AD7904 , REF_IN/1024 for the
AD7914, and REF_IN/4096 for the AD7924. The ideal transfer
characteristic for the AD7904/AD7914/AD7924 when straight
binary coding is selected is shown in Figure 7, and the ideal
transfer characteristic for the AD7904/AD7914/AD7924 when
twos complement coding is selected is shown in Figure 8.
111…111
111…110
•
•
111…000
•
011…111
•
•
000…010
000…001
000…000
0V ^{1 LSB}
1LSB = V _REF/256 AD7904
1LSB = V _REF/1024 AD7914
1LSB = V_REF/4096 AD7924
+V_REF ؊ 1 LSB
ANALOG INPUT
NOTE: V _REF IS EITHER REF_IN OR 2 ؋ REF_IN
Figure 7. Straight Binary Transfer Characteristic
011…111
011…110
•
•
000…001
000…000
111…111
•
•
100…010
100…001
100…000
1LSB = 2 ؋ V_REFր256 AD7904
1LSB = 2 ؋ V_REFր1024 AD7914
1LSB = 2 ؋ V_REFր4096 AD7924
–V_REF ؉ 1LSB
+V_REF ؊ 1LSB
V_REF ؊ 1LSB
ANALOG INPUT
Figure 8. Twos Complement Transfer Characteristic with
REF_IN ± REF_IN Input Range
Handling Bipolar Input Signals
Figure 9 shows how useful the combination of the 2 × REF_IN
input range and the twos complement output coding scheme is
for handling bipolar input signals. If the bipolar input signal is
biased about REF_IN and twos complement output coding is
selected, then REF_IN becomes the zero code point, –REF_IN is
negative full scale and +REF_IN becomes positive full scale, with
a dynamic range of 2 × REF_IN.
TYPICAL CONNECTION DIAGRAM
Figure 10 shows a typical connection diagram for the AD7904/
AD7914/AD7924. In this setup the GND pin is connected to
the analog ground plane of the system. In Figure 10, REF_IN is
connected to a decoupled 2.5 V supply from a reference source,
the AD780, to provide an analog input range of 0 V to 2.5 V (if
RANGE bit is 1) or 0 V to 5 V (if RANGE bit is 0). Although
the AD7904/AD7914/AD7924 is connected to a V_DD of 5 V, the
serial interface is connected to a 3 V microprocessor. The V_DRIVE
pin of the AD7904/AD7914/AD7924 is connected to the same 3 V
supply of the microprocessor to allow a 3 V logic interface (see
the Digital Inputs section). The conversion result is output in a
–16–
REV. 0