ADUC7024_15 Datasheet, PDF (15/104 Pages) Analog Devices – Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU

Data Sheet
ADuC7019/20/21/22/24/25/26/27/28/29
Table 4. I²C Timing in Fast Mode (400 kHz)
Parameter
tL
tH
tSHD
tDSU
tDHD
tRSU
tPSU
tBUF
tR
tF
tSUP
Description
SCL low pulse width¹
SCL high pulse width¹
Start condition hold time
Data setup time
Data hold time
Setup time for repeated start
Stop condition setup time
Bus-free time between a stop condition and a start condition
Rise time for both SCL and SDA
Fall time for both SCL and SDA
Pulse width of spike suppressed
1 _{tHCLK depends on the clock divider or CD bits in the POWCON MMR. tHCLK = tUCLK/2}CD_{; see Figure 67.}
Table 5. I²C Timing in Standard Mode (100 kHz)
Parameter
tL
tH
tSHD
tDSU
tDHD
tRSU
tPSU
tBUF
tR
tF
Description
SCL low pulse width¹
SCL high pulse width¹
Start condition hold time
Data setup time
Data hold time
Setup time for repeated start
Stop condition setup time
Bus-free time between a stop condition and a start condition
Rise time for both SCL and SDA
Fall time for both SCL and SDA
1 _{tHCLK depends on the clock divider or CD bits in the POWCON MMR. tHCLK = tUCLK/2}CD_{; see Figure 67.}
Slave
Master
Min Max Typ
Unit
200
1360
ns
100
1140
ns
300
ns
100
740
ns
0
400
ns
100
ns
100
400
ns
1.3
s
300 200
ns
300
ns
50
ns
Slave
Master
Min Max Typ
Unit
4.7
μs
4.0
ns
4.0
μs
250
ns
0
3.45
μs
4.7
μs
4.0
μs
4.7
μs
1
μs
300
ns
t_BUF
t_SUP
SDA (I/O)
MSB
LSB
ACK
t_PSU
t_DSU
t_SHD
t_DHD
t_H
t_DSU
t_DHD
t_RSU
SCL (I)
P
S
STOP
START
CONDITION CONDITION
1
2–7
8
t_L
9
t_SUP
Figure 14. I²C Compatible Interface Timing
S(R)
REPEATED
START
t_R
MSB
t_F
t_R
1
t_F
Rev. F | Page 15 of 104