ADA4862-3_16 Datasheet, PDF (15/17 Pages) Analog Devices – High Speed, G = +2, Low Cost, Triple Op Amp

ADA4862-3
LAYOUT CONSIDERATIONS
As is the case with all high speed applications, careful attention
to printed circuit board layout details prevents associated board
parasitics from becoming problematic. Proper RF design
technique is mandatory. The PCB should have a ground plane
covering all unused portions of the component side of the
board to provide a low impedance return path. Removing the
ground plane on all layers from the area near the input and
output pins reduces stray capacitance. Termination resistors and
loads should be located as close as possible to their respective
inputs and outputs. Input and output traces should be kept as
far apart as possible to minimize coupling (crosstalk) though
the board. Adherence to microstrip or stripline design
techniques for long signal traces (greater than about 1 inch) is
recommended.
POWER SUPPLY BYPASSING
Careful attention must be paid to bypassing the power supply
pins of the ADA4862-3. High quality capacitors with low
equivalent series resistance (ESR), such as multilayer ceramic
capacitors (MLCCs), should be used to minimize supply voltage
ripple and power dissipation. A large, usually tantalum, 10 μF to
47 μF capacitor located in proximity to the ADA4862-3 is
required to provide good decoupling for lower frequency
signals. In addition, 0.1 μF MLCC decoupling capacitors should
be located as close to each of the power supply pins as is
physically possible, no more than 1/8 inch away. The ground
returns should terminate immediately into the ground plane.
Locating the bypass capacitor return close to the load return
minimizes ground loops and improves performance.
Rev. A | Page 14 of 16