ADA4075-2 Datasheet, PDF (15/24 Pages) Analog Devices – Ultralow Noise Amplifier at Lower Power

APPLICATIONS INFORMATION
INPUT PROTECTION
The maximum differential input voltage that can be applied to
the ADA4075-2 is determined by the internal diodes connected
across its inputs. These diodes limit the maximum differential
input voltage to ±1 V and are needed to prevent base-emitter
junction breakdown from occurring in the input stage of the
ADA4075-2 when very large differential voltages are applied. To
make sure that the ultralow voltage noise feature of the ADA4075-2
is preserved, the commonly used internal resistors in series with
the inputs were not used to limit the current in the diodes.
In small-signal applications, this is not an issue; however, in
applications where large differential voltages can be inadvertently
applied to the device, large currents may flow through these
diodes. If the differential voltage of the ADA4075-2 exceeds ±1 V,
external resistors should be used at both inputs of the op amp to
limit the input currents to less than ±10 mA (see Figure 58).
However, when series resistors are added, the total voltage noise
degrades because the resistors may have a thermal noise that is
greater than the voltage noise of the op amp itself. For example, a
1 kΩ resistor at room temperature has a thermal noise of 4 nV/√Hz,
whereas the ADA4075-2 has an ultralow voltage noise of only
2.8 nV/√Hz typical.
ADA4075-2
R1 2
1
R2 3
Figure 58. Input Protection
TOTAL HARMONIC DISTORTION
The total harmonic distortion + noise (THD + N) of the
ADA4075-2 is 0.0002% typical with a load resistance of 2 kΩ.
Figure 59 shows the performance of the ADA4075-2 driving a
2 kΩ load with supply voltages of ±4 V and ±15 V. Notice that
there is more distortion for the supply voltage of ±4 V than for a
supply voltage of ±15 V. Thus, it is very important to operate the
ADA4075-2 at a supply voltage greater than ±5 V for optimum
distortion. The THD + noise graphs for supply voltages of ±5 V
and ±18 V are available in Figure 54 and Figure 55.
ADA4075-2
1
0.1
0.01
0.001
V_SY = ±4V
R_L = 2kΩ
V_IN = 1.5V rms
V_SY = ±15V
R_L = 2kΩ
V_IN = 3V rms
0.0001
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 59. THD + Noise vs. Frequency
PHASE REVERSAL
Phase reversal occurs in some amplifiers when the input
common-mode voltage range is exceeded. When the voltage
driving the input to these amplifiers exceeds the maximum
input common-mode voltage range, the output of the amplifiers
changes polarity. Phase reversal can cause permanent damage to
the amplifier as well as system lockups in feedback loops.
The ADA4075-2 amplifiers have been carefully designed to prevent
output phase reversal when both inputs are maintained within
the specified input voltage range. If one or both inputs exceed
the input voltage range but remain within the supply rails, the
output is capped at the maximum output that it can swing to.
For a supply voltage of ±15 V and a load resistance of 2 kΩ, the
output is capped at 13 V typical when the input voltage exceeds
the input voltage range but stays within the supply rails. Figure 60
shows the output voltage of the AD4075-2 configured as a unity-
gain buffer with a supply voltage of ±15 V.
V_IN
V_SY = ±15V
V_OUT
TIME (40µs/DIV)
Figure 60. No Phase Reversal
Rev. 0 | Page 15 of 24