AD8345_15 Datasheet, PDF (15/20 Pages) Analog Devices – 140 MHz to 1000 MHz Quadrature Modulator

AD8345
DAC
DATA
INPUTS
SELECT
WRITE
CLOCK
DVDD DCOM
AVDD
MUX
CONTROL
LATCH
"I"
2⋅
AD9761
"I"
DAC
IOUTA
IOUTB _140Ω
210Ω
140Ω
LATCH
"Q"
2⋅
SLEEP FS ADJ
R_SET
2kΩ
"Q"
DAC
QOUTA
QOUTB _140Ω
REFIO
0.1μF
210Ω
140Ω
Figure 31. AD8345/TxDAC Interface
IBBP
VPS1
VPS2
IBBN
VOUT
Σ
QBBP
QBBN
PHASE
SPLITTER
LOIP
LOIN
AD8345
SOLDERING INFORMATION
The AD8345 is packaged in a 16-lead TSSOP_EP package. For
optimum thermal conductivity, the exposed pad can be
soldered to the exposed metal of a ground plane. This results in
a junction-to-air thermal impedance (θJA) of 30°C/W. However,
soldering is not necessary for safe operation. If the exposed pad
is not soldered down, then the θJA is equal to 95°C/W.
EVALUATION BOARD
Figure 32 shows the schematic of the AD8345 evaluation board.
Note that uninstalled components are marked as open. This is a
4-layer board, with the two center layers used as ground plane,
and top and bottom layers used as signal and power planes.
The board is powered by a single supply (VS) in the range 2.7 V
to 5.5 V. The power supply is decoupled by 0.01 μF and 1000 pF
capacitors. The circuit closely follows the basic connection
schematic with SW1 in Position B. If SW1 is in Position A, the
enable pin (ENBL) is pulled to ground by a 10 kΩ resistor, and
the device is in its power-down mode.
All connectors are SMA-type. The I and Q inputs are dc-coupled to
allow a direct connection to a dual DAC with differential outputs.
Resistor pads are provided in case termination at the I and Q inputs
is required. The local oscillator input (LO) is terminated to approxi-
mately 50 Ω with an external 50 Ω resistor to ground. A 1:1 wide-
band transformer (ETC1-1-13) provides a differential drive to the
AD8345’s differential LO input.
R1
(OPEN)
AD8345
R9
(OPEN)
IP
1 IBBP
QBBP 16
QP
LO
VPOS
IN
2 IBBN
QBBN 15
QN
R2
R10
(OPEN)
(OPEN)
3 COM3
COM3 14
C1
1000pF
5
1
R6
T1
C2
50Ω
ETC1-1-13 ² 1000pF
4
3
4 COM1
5 LOIN
6 LOIP
C3
0.01μF
ENBL
R7
C4
0Ω
1000pF
R8
10kΩ
A
B SW1
7 VPS1
8 ENBL
COM3 13
VPS2 12
VOUT 11
COM2 10
R11
0Ω
C5
1000pF
R12
0Ω
C7
1000pF
R14
(OPEN)
COM3 9
VPOS
Figure 32. Evaluation Board Schematic
VPOS
C6
0.01μF
R15
(OPEN)
VOUT
Rev. B | Page 15 of 20