AD8047_15 Datasheet, PDF (15/17 Pages) Analog Devices – 250 MHz, General Purpose Voltage Feedback Op Amps

AD8047/AD8048
Choose
F_O = Cutoff Frequency = 20 MHz
␣ = Damping Ratio = 1/Q = 2
H = Absolute Value of Circuit Gain = ^–R4 = 1
R1
Then,
k = 2 π F_O C1
C2
=
4
C1(H
α²
+ 1)
R1 = ^α
2 HK
R3
=
2
K
α
(H
+
1)
R4 = H(R1)
A/D Converter Driver
As A/D converters move toward higher speeds with higher reso-
lutions, there becomes a need for high performance drivers that
will not degrade the analog signal to the converter. It is desir-
able from a system’s standpoint that the A/D be the element in
the signal chain that ultimately limits overall distortion. This
places new demands on the amplifiers used to drive fast, high
resolution A/Ds.
With high bandwidth, low distortion, and fast settling time,
the AD8047 and AD8048 make high performance A/D drivers
for advanced converters. Figure 12 is an example of an AD8047
used as an input driver for an AD872A, a 12-bit, 10 MSPS
A/D converter.
Layout Considerations
The specified high speed performance of the AD8047 and
AD8048 requires careful attention to board layout and compo-
nent selection. Proper RF design techniques and low-pass
parasitic component selection are mandatory.
The PCB should have a ground plane covering all unused por-
tions of the component side of the board to provide a low
impedance path. The ground plane should be removed from the
area near the input pins to reduce stray capacitance.
Chip capacitors should be used for the supply bypassing (see
Figure 12). One end should be connected to the ground plane
and the other within 1/8 inch of each power pin. An additional
large (0.47 µF to 10 µF) tantalum electrolytic capacitor should
be connected in parallel, though not necessarily so close, to the
supply current for fast, large signal changes at the output.
The feedback resistor should be located close to the inverting
input pin in order to keep the stray capacitance at this node to a
minimum. Capacitance variations of less than 1 pF at the inverting
input will significantly affect high speed performance.
Stripline design techniques should be used for long signal traces
(greater than about 1 inch). These should be designed with a
characteristic impedance of 50 Ω or 75 Ω and be properly termi-
nated at each end.
+5V DIGITAL
+5V ANALOG
10␮F
ANALOG IN
0.1␮F
7
2
AD8047 6
3
4
0.1␮F
10␮F
–5V
ANALOG
+5V ANALOG
0.1␮F
4
AV_DD
5
AGND
7
DV_DD
6
DGND
22
DRV_DD
23
DRGND
0.1␮F
1␮F
AD872A
21
CLK
20
OTR
1
V_INA
2
V_INB
27
REF GND
28
REF IN
26
REF OUT
MSB ¹⁹
18
BIT2
17
BIT3 ₁₆
BIT4
BIT5
15
BIT6 ¹⁴
13
BIT7 ₁₂
BIT8 ₁₁
BIT9 ₁₀
BIT10
9
BIT11
BIT12
8
24
AGND
AV_SS
3
AV_SS
25
10⍀
0.1␮F
+5V DIGITAL
0.1␮F
CLOCK INPUT
4 9 . 9⍀
DIGITAL OUTPUT
0.1␮F
0.1␮F
–5V ANALOG
Figure 12. AD8047 Used as Driver for an AD872A, a 12-Bit, 10 MSPS A/D Converter
–14–
REV. A