ADM1172 Datasheet, PDF (14/16 Pages) Analog Devices – 2.7 V to 16.5 V Hot Swap Controller with Power-Fail Comparator

ADM1172
threshold. The device can be reset by toggling the ON-CLR pin
or by manually pulling the TIMER pin low. On the ADM1172-1,
the TIMER pin activates the 2 μA pull-down once the 1.3 V
threshold is reached, and continues to pull down until it reaches
the 0.2 V threshold. At this point, the 100 μA pull-down is
activated and the GATE pin is enabled. The device keeps
retrying in the manner as shown in Figure 40.
The duty cycle of this automatic retry cycle is set to the ratio of
2 μA/60 μA, which approximates 3.8% on. The value of the
timer capacitor determines the on time of this cycle. This time
is calculated as follows:
tON = 1.3 × CTIMER/60 μA
tOFF = 1.1 × CTIMER/2 μA
I_RSENSE
2µA
V_TIMER
V_GSFET
60µA
100µA
V_OUT
SHORT-
CIRCUIT
EVENT
COMP2
COMP1
FAULT
CYCLE
FAULT
CYCLE
Figure 40. ADM1172-1 Automatic Retry During Overcurrent Fault
AUTOMATIC RETRY OR LATCHED OFF
The ADM1172 is available in two models. The ADM1172-1
has an automatic retry system whereby when a current fault is
detected, the FET is shut down after a time determined by the
timer capacitor, and it is switched on again in a controlled con-
tinuous cycle to determine if the fault remains (see Figure 40
for details). The period of this cycle is determined by the timer
capacitor at a duty cycle of 3.8% on and 96.2% off.
The ADM1172-2 model has a latch off system whereby when a
current fault is detected, the GATE is switched off after a time
determined by the timer capacitor (see Figure 41 for details).
Toggling the ON-CLR pin, or pulling the TIMER pin to GND
for a brief period, resets this condition.
I_RSENSE
5µA
V_TIMER
60µA
V_GSFET
V_OUT
SHORT-
CIRCUIT
EVENT
COMP2
COMP1
Figure 41. ADM1172-2 Latch Off After Overcurrent Fault
POWER-FAIL COMPARATOR
The ADM1172 has an integrated comparator that can be used
as a power-fail/OV/UV detector. The comparator has a 0.6 V
reference, and it is designed to be active high when the voltage
on the PFI pin drops to below this threshold. The only action
that results from the PFI pin tripping the comparator is the
change of state on the PFO pin. The PFI pin can be used to
monitor the supply on either side of the FET, for an OV or UV
condition set by a resistor divider network. The PFO can then
be sent to a control system and used as a power-good/power-fail
signal. The PFO output has a 5 μA internal pull-up. A 10 kΩ
resistor is recommended on the PFO pin to ensure that it is
either pulled up or down during power-up. The pin is in high
impedance while VCC < UVLO and can result in invalid power-
fail signals.
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